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參數(shù)資料
| 型號： | 24LC41IP |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 1K/4K 2.5V Dual Mode, Dual Port I2C⑩ Serial EEPROM |
| 中文描述： | 1K/4K 2.5V的雙模式，雙端口串行EEPROM的I2C⑩ |
| 文件頁數(shù)： | 8/18頁 |
| 文件大小： | 150K |
| 代理商： | 24LC41IP |
24LC41
DS21140F-page 8
2004 Microchip Technology Inc.
4.0
WRITE OPERATION
Write operations are identical for the DDC Monitor Port
(when in Bidirectional mode) and the Microcontroller
Access Port, with the exception of the VCLK/DWP and
MWP pins noted in the next sections. Data can be
written using either a Byte Write or Page Write
command. Write commands for the DDC Monitor Port
and the Microcontroller Access Port are completely
independent of one another.
4.1
Byte Write
Following the Start signal from the master, the slave
address (4-bits), the Chip Select bits (3-bits) and the
R/W bit which is a logic low is placed onto the bus by
the master transmitter. This indicates to the addressed
slave receiver that a byte with a word address will
follow after it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmit-
ted by the master is the word address and will be
written into the address pointer of the port. After
receiving another Acknowledge signal from the port,
the master device will transmit the data word to be
written into the addressed memory location. The port
acknowledges again and the master generates a Stop
condition. This initiates the internal write cycle, and
during this time, the port will not generate Acknowledge
signals (Figure 4-1).
For the DDC Monitor Port it is required that VCLK/DWP
be held at a logic high level in order to program the
device. This applies to byte write and page write
operation. Note that VCLK/DWP can go low while the
device is in its self-timed program operation and not
affect programming.
For the Microcontroller Access Port, the MWP pin must
be held to V
SS
during the entire write operation.
4.2
Page Write
The write control byte, word address, and the first data
byte are transmitted to the port in the same way as in a
byte write. But, instead of generating a Stop condition,
the master transmits up to eight data bytes to the DDC
Monitor Port or 16 bytes to the Microcontroller Access
Port, which are temporarily stored in the on-chip page
buffer and will be written into the memory after the
master has transmitted a Stop condition. After the
receipt of each word, the three lower order address
pointer bits are internally incremented by one. The
higher order 5-bits of the word address remains
constant. If the master should transmit more than eight
words to the DDC Monitor Port or 16 words to the
Microcontroller Access Port prior to generating the Stop
condition, the address counter will roll over and the
previously received data will be overwritten. As with the
byte write operation, once the Stop condition is
received an internal write cycle will begin (Figure 4-2).
For the DDC Monitor Port, it is required thatVCLK/
DWP be held at a logic high level in order to program
the device. This applies to byte write and page write
operation. Note that VCLK/DWP can go low while the
device is in its self-timed program operation and not
affect programming.
For the Microcontroller Access Port, the MWP pin must
be held to V
SS
during the entire write operation..
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes actually
being written. Physical page boundaries
start at addresses that are integer multi-
ples of the page buffer size (or ‘page size’)
and end at addresses that are integer
multiples of [page size - 1]. If a Page Write
command attempts to write across a
physical page boundary, the result is that
the data wraps around to the beginning of
the current page (overwriting data
previously stored there), instead of being
written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
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PDF描述 |
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| 24LC41P | 1K/4K 2.5V Dual Mode, Dual Port I2C⑩ Serial EEPROM |
| 24LC41 | 1K/4K 2.5V Dual Mode, Dual Port I 2 C Serial EEPROM |
| 24LC41-IP | 1K/4K 2.5V Dual Mode, Dual Port I 2 C Serial EEPROM |
| 24LC41-P | 1K/4K 2.5V Dual Mode, Dual Port I 2 C Serial EEPROM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LC512/S16K | 制造商:Microchip Technology Inc 功能描述:512K, 64K X 8, 2.5V SER EE,IND - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LC512/W16K | 制造商:Microchip Technology Inc 功能描述:512K, 64K X 8, 2.5V SER EE,IND,WAFER - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LC512/WF16K | 制造商:Microchip Technology Inc 功能描述:512K, 64K X 8, 2.5V SER EE,IND - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LC512-E/MF | 功能描述:電可擦除可編程只讀存儲器 64kx8 - 2.5V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC512-E/MS | 制造商:Microchip Technology Inc 功能描述:512K, 64K X 8, 2.5V SER EE, EXT - Rail/Tube 制造商:Microchip Technology Inc 功能描述:IC EEPROM 512KBIT 400KHZ 8MSOP 制造商:Microchip Technology Inc 功能描述:512K, 64K X 8, 2.5V SER EE, EXT, 8 MSOP 3x3mm TUBE |
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