參數(shù)資料
型號(hào): 24LC174
廠商: Microchip Technology Inc.
英文描述: 16K 2.5V Cascadable CMOS serial EEPROMs with OTP Security Page(16K位,2.5V層疊式IIC串行EEPROM)
中文描述: 16K的2.5V的安全頁(yè)的OTP(16K的位,2.5V的層疊式進(jìn)口證串行EEPROM的串行EEPROM級(jí)聯(lián)的CMOS)
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 133K
代理商: 24LC174
1995 Microchip Technology Inc.
DS21101C-page 1
FEATURES
Single supply with operation down to 2.5V
16 Bytes OTP Secure Memory
Low power CMOS technology
- 1 mA active current typical
- 10
μ
A standby current typical at 5.5V
- 5
μ
A standby current typical at 3.0V
Organized as 8 blocks of 256 bytes (8 x 256 x 8)
Two wire serial interface bus, I
Functional address inputs for cascading up to 8
devices
Schmitt trigger, filtered inputs for noise suppression
Output slope control to eliminate ground bounce
100 kHz (2.5V) and 400 kHz (5V) compatibility
Self-timed write cycle (including auto-erase)
Page-write buffer for up to 16 bytes
2 ms typical write cycle time for page-write
Hardware write protect for entire memory
Can be operated as a serial ROM
Factory programming (QTP) available
ESD protection > 4,000V
10,000,000 ERASE/WRITE cycles guaranteed
Data retention > 200 years
8 pin DIP, 8-lead SOIC packages
Available for extended temperature ranges
- Commercial: 0
°
C to +70
- Industrial: -40
°
C to +85
C
compatible
°
°
C
C
DESCRIPTION
The Microchip Technology Inc. 24LC174 is a cascad-
able 16K bit Electrically Erasable PROM. The device
is organized as 8 blocks of 256 x 8 bit memory with a
two wire serial interface and provides a specially
addressed OTP (one-time programmable) 16 byte
security block. Low voltage design permits operation
down to 2.5 volts with standby and active currents of
only 5
μ
A and 1 mA respectively. The 24LC174 also
has a page-write capability for up to 16 bytes of data.
The 24LC174 is available in the standard 8-pin DIP and
8-lead surface mount SOIC packages.
The three select pins, A0, A1, and A2, function as chip
select inputs and allow up to eight devices to share a
common bus, for up to 128K bits total system
EEPROM.
PACKAGE TYPE
BLOCK DIAGRAM
DIP
8-lead SOIC
1
2
3
4
8
7
6
5
V
WP
SCL
SDA
CC
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
A0
A1
A2
V
SS
V
WP
SCL
SDA
CC
24LC174
24LC174
HV GENERATOR
EEPROM ARRAY
(8 x 256 x 8)
PAGE LATCHES
YDEC
XDEC
SENSE AMP
R/W CONTROL
MEMORY
CONTROL
LOGIC
I/O
CONTROL
LOGIC
WP
SDA
SCL
V
CC
V
SS
A0
A2
A1
24LC174
16K 2.5V Cascadable CMOS Serial EEPROM with OTP Security Page
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