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參數(shù)資料
| 型號： | 24LC08B |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 8K/16K I 2 C ⑩ Serial EEPROMs in ISO Micromodules |
| 中文描述： | 8K/16K的I 2 C⑩在ISO微型模塊串行EEPROM |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 453K |
| 代理商： | 24LC08B |
24LC08B/16B MODULES
DS21224A-page 4
1997 Microchip Technology Inc.
2.0
PAD DESCRIPTIONS
2.1
SDA (Serial Data)
This is a Bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
CC
(typical 10
).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
2.2
SCL (Serial Clock)
This input is used to synchronize the data transfer from
and to the device.
3.0
FUNCTIONAL DESCRIPTION
The 24LC08B/16B supports a Bi-directional 2-wire bus
and data transmission protocol. A device that sends
data onto the bus is defined as transmitter, and a
device receiving data as receiver. The bus has to be
controlled by a master device which generates the
serial clock (SCL), controls the bus access, and gener-
ates the START and STOP conditions, while the
24LC08B/16B works as slave. Both, master and slave
can operate as transmitter or receiver but the master
device determines which mode is activated.
4.0
BUS CHARACTERISTICS
The following
bus protocol
has been defined:
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
defined (Figure 5-2).
4.1
Bus not Busy (A)
Both data and clock lines remain HIGH.
4.2
Start Data Transfer (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition.
All commands must be preceded by a START condi-
tion.
4.3
Stop Data Transfer (C)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition.
4.4
Data Valid (D)
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device
and is theoretically unlimited, although only the last 16
will be stored when doing a write operation. When an
overwrite does occur it will replace data in a first in first
out fashion.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24LC08B-MT | 8K/16K I 2 C ⑩ Serial EEPROMs in ISO Micromodules |
| 24LC08B Module | 8K/16K IIC Sserial EEPROMs in ISO micromoduls(8K位,1M次擦寫周期,ISO模塊) |
| 24LC16B Module | 16K IIC Serial EEPROMs in ISO micromoduls(16K位,1M次擦寫周期,ISO模塊) |
| 24LC08 | 3-Wire Serial EEPROMs |
| 24LC09 | 8K 2.5V ACR SERIAL EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LC08B/MT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24LC08B/P | 功能描述:電可擦除可編程只讀存儲器 1kx8 - 2.5V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC08B-/P | 制造商:Microchip Technology Inc 功能描述: |
| 24LC08B/P | 制造商:Microchip Technology Inc 功能描述:IC EEPROM SERIAL 8K 24LC08 DIP8 |
| 24LC08B-/SL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
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