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參數(shù)資料
| 型號： | 24LC025IST |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 182K |
| 代理商： | 24LC025IST |
24LC024/24LC025
DS21210D-page 4
1999 Microchip Technology Inc.
2.0
PIN DESCRIPTIONS
2.1
SDA Serial Data
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
CC
(typical 10 k
for 100 kHz, 2 k
for
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
2.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
2.3
A0, A1, A2
The levels on these inputs are compared with the cor-
responding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 24LC024/24LC025 devices may be con-
nected to the same bus by using different chip select bit
combinations. These inputs must be connected to
either V
CC
or V
SS
.
2.4
WP (24LC024 only)
This is the hardware write protect pin. It must be tied to
V
CC
or V
SS
. If tied to Vcc, the hardware write protection
is enabled. If the WP pin is tied to Vss the hardware
write protection is disabled. Note that the WP pin is
available only on the 24LC024. This pin is not internally
connected on the 24LC025.
2.5
Noise Protection
The 24LC024/24LC025 employs a V
CC
threshold
detector circuit which disables the internal erase/write
logic if the V
CC
is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
3.0
FUNCTIONAL DESCRIPTION
The 24LC024/24LC025 supports a bi-directional 2-wire
bus and data transmission protocol. A device that
sends data onto the bus is defined as transmitter, and
a device receiving data as receiver. The bus has to be
controlled by a master device which generates the
serial clock (SCL), controls the bus access, and gener-
ates the START and STOP conditions, while the
24LC024/24LC025 works as slave. Both master and
slave can operate as transmitter or receiver but the
master device determines which mode is activated.
This Material Copyrighted by Its Respective Manufacturer
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24LC025P | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 24LC025SN | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 24LC025ST | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 24LC025TISN | 3.3V, DS3/E3/STS-1 Line Interface Unit |
| 24LC025TIST | 3.3V, DS3/E3/STS-1 Line Interface Unit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LC025P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24LC025SN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24LC025ST | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24LC025T/SN | 功能描述:電可擦除可編程只讀存儲器 256x8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC025T/ST | 功能描述:電可擦除可編程只讀存儲器 256x8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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