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參數(shù)資料
| 型號： | 24LC01B |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 1K 2.5V CMOS serial EEPROM(1K位、8字節(jié)頁面緩沖器、有硬件寫保護、10M次擦寫周期、2.5-5.5V工作電壓、CMOS IIC串行EEPROM) |
| 中文描述： | 一千為2.5V的CMOS串行EEPROM（每1000位，8字節(jié)頁面緩沖器，有硬件寫保護，1000萬次擦寫周期,2.5 - 5 .5 V工作電壓，國際進口證的CMOS串行EEPROM的） |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 111K |
| 代理商： | 24LC01B |
24LC01B/02B
DS20071G-page 8
1995 Microchip Technology Inc.
8.3
Sequential Read
Sequential reads are initiated in the same way as a ran-
dom read except that after the 24LC01B/02B transmits
the first data byte, the master issues an acknowledge
as opposed to a stop condition in a random read. This
directs the 24LC01B/02B to transmit the next sequen-
tially addressed 8 bit word (see Figure 9-1).
To provide sequential reads the 24LC01B/02B contains
an internal address pointer which is incremented by
one at the completion of each operation. This address
pointer allows the entire memory contents to be serially
read during one operation.
8.4
Noise Protection
The 24LC01B/02B employs a V
CC
threshold detector
circuit which disables the internal erase/write logic if
the V
CC
is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
9.0
PIN DESCRIPTIONS
9.1
SDA Serial Address/Data Input/Output
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
CC
(typical 10K
for 100 kHz, 1K
for 400
kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
9.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
9.3
WP
This pin must be connected to either V
SS
or V
CC
.
If tied to V
SS
, normal memory operation is enabled
(read/write the entire memory).
If tied to V
CC
, WRITE operations are inhibited. The
entire memory will be write-protected. Read opera-
tions are not affected.
This feature allows the user to use the 24LC01B/02B
as a serial ROM when WP is enabled (tied to V
CC
).
9.4
A0, A1, A2
These pins are not used by the 24LC01B/02B. They
may be left floating or tied to either V
SS
or V
CC
.
FIGURE 9-1:
SEQUENTIAL READ
S
T
O
P
SDA LINE
DATA n
DATA n + 1
BUS ACTIVITY:
MASTER
BUS ACTIVITY:
A
C
K
A
C
K
A
C
K
DATA n + 2
A
C
K
P
DATA n + X
CONTROL
BYTE
N
O
A
C
K
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LC01B/MS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| 24LC01B/MT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24LC01B-/OT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24LC01B/P | 功能描述:電可擦除可編程只讀存儲器 128x8 - 1.8V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC01B-/P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
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