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參數(shù)資料
| 型號(hào)： | 24LC00 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 128 Bit IIC Bus Serial EEPROMs(2.5~6V,128位,IIC總線串行EEPROM) |
| 中文描述： | 128位IIC總線（2.5?6V的，128位，進(jìn)口證總線串行EEPROM的串行EEPROM） |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 182K |
| 代理商： | 24LC00 |
24xx00
DS21178B-page 4
1996 Microchip Technology Inc.
2.0
PIN DESCRIPTIONS
2.1
SDA Serial Data
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
CC
(typical 10 k
for 100 kHz, 2 k
for
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are reserved
for indicating the START and STOP conditions.
2.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
2.3
Noise Protection
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
3.0
FUNCTIONAL DESCRIPTION
The 24xx00 supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus has to be con-
trolled by a master device which generates the serial
clock (SCL), controls the bus access, and generates
the START and STOP conditions, while the 24xx00
works as slave. Both master and slave can operate as
transmitter or receiver, but the master device deter-
mines which mode is activated.
4.0
BUS CHARACTERISTICS
The following
bus protocol
has been defined:
Data transfer may be initiated only when the bus is
not busy.
During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1
Bus not Busy (A)
Both data and clock lines remain HIGH.
4.2
Start Data Transfer (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition. All
commands must be preceded by a START condition.
0.1
Stop Data Transfer (C)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition.
4.3
Data Valid (D)
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device
and is theoretically unlimited.
4.4
Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an acknowledge bit on the last
byte that has been clocked out of the slave. In this case,
the slave must leave the data line HIGH to enable the
master to generate the STOP condition (Figure 4-2).
Note:
The 24xx00 does not generate any
acknowledge bits if an internal program-
ming cycle is in progress.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LC00/OT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|16X8|CMOS|TSOP|6PIN|PLASTIC |
| 24LC00-/OT | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K Software Addressable I2C⑩ Serial EEPROM |
| 24LC00/P | 功能描述:電可擦除可編程只讀存儲(chǔ)器 128 Bit 1.8V I2C bus RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC00-/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K Software Addressable I2C⑩ Serial EEPROM |
| 24LC00/P | 制造商:Microchip Technology Inc 功能描述:EEPROM SERIAL 128BIT 24LC00 DIP8 |
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