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參數(shù)資料
| 型號(hào)： | 24C64 |
| 廠商： | Atmel Corp. |
| 元件分類： | EEPROM |
| 英文描述： | 2-Wire Serial EEPROM |
| 中文描述： | 2線串行EEPROM |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 84K |
| 代理商： | 24C64 |
CAT24C323/643
5
Advanced
Doc. No. 25084-00 12/98
PIN DESCRIPTIONS
WDI
: WATCHDOG INPUT
If there is no transition on the WDI for more than 1.6
seconds, the watchdog timer times out.
WP
: WRITE PROTECT
If the pin is tied to V
CC
the entire memory array becomes
Write Protected (READ only). When the pin is tied to V
SS
or left floating normal read/write operations are allowed
to the device.
SCL
: SERIAL CLOCK
The serial clock input clocks all data transferred into or
out of the device.
RESET/
These are open drain pins and can be used as reset
trigger inputs. By forcing a reset condition on the pins the
device will initiate and maintain a reset condition for
approximately 200ms. RESET pin must be connected
through a pull-down and
RESET
pin must be connected
through a pull-up device.
RESET
: RESET I/O
SDA:
SERIAL DATA/ADDRESS
The bidirectional serial data/address pin is used to
transfer all data into and out of the device. The SDA pin
is an open drain output and can be wire-ORed with other
open drain or open collector outputs.
Reset Controller Description
The CAT24CXXX provides a precision RESET control-
ler that ensures correct system operation during brown-
out and power up/down conditions. It is configured
Figure 1. RESET Output Timing
with open drain RESET outputs. During power-up, the
RESET outputs remain active until V
CC
reaches the
V
TH
threshold and will continue driving the outputs for
approximately 200ms (t
PURST
) after reaching V
TH.
After
the t
PURST
timeout interval, the device will cease to drive
reset outputs. At this point the reset outputs will be pulled
up or down by their respective pull up/pull down devices.
During power-down, the RESET outputs will begin driv-
ing active when V
CC
falls below V
TH.
The RESET
outputs will be valid so long as V
CC
is >1.0V (V
RVALID
).
The RESET pins are I/Os; therefore, the CAT24CXXX
can act as a signal conditioning circuit for an externally
applied reset. The inputs are level triggered; that is, the
RESET input in the 24CXXX will initiate a reset timeout
after detecting a high and the
RESET
input in the
24CXXX will initiate a reset timeout after detecting a low.
Watchdog Timer
The Watchdog Timer provides an independent protec-
tion for microcontrollers. During a system failure, the
CAT24CXXX will respond with a reset signal after a
time-out interval of 1.6 seconds for a lack of activity. The
24C323/643 is designed with a WDI input pin for the
Watchdog Timer function. For the 24C323/643, if the
microcontroller does not toggle the WDI input pin within
1.6 seconds, the Watchdog Timer times out. This will
generate a reset condition on reset outputs. The Watch-
dog Timer is cleared by any transition on WDI.
As long as the reset signal is asserted, the Watchdog
Timer will not count and will stay cleared.
DEVICE OPERATION
GLITCH
t
V
CC
PURST
t
PURST
t
RPD
t
RVALID
V
V
TH
RESET
RESET
RPD
t
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24C640-EP | DIODE ZENER 20.0V 150MW SSMINI-2 |
| 24C640-ESN | 64K SPI Bus Serial EEPROM |
| 24C640-EST | DIODE ZENER 24V 150MW SSMINI-2 |
| 24C640-IP | DIODE ZENER 27.0V 150MW SSMINI-2 |
| 24C640-ISN | DIODE ZENER 31V 150MW SSMINI-2 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24C64_1 | 制造商:ESTEK 制造商全稱:ESTEK 功能描述:available in space-saving 8-lead PDIP, 8-lead SOP, and 8-lead TSSOP packages |
| 24C640-EP | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
| 24C640-ESN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
| 24C640-EST | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
| 24C640-IP | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
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