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參數(shù)資料
| 型號： | 24C64 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS IC 2-WIRE BUS 64K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 8K X 8 BIT EEPROM |
| 中文描述： | 我葷的CMOS 2線總線64K的電可擦除可編程ROM的8K的× 8位EEPROM |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 84K |
| 代理商： | 24C64 |
CAT24C323/643
10
Advanced
Doc. No. 25084-00 12/98
Figure 10. Selective Read Timing
Figure 11. Sequential Read Timing
Immediate/Current Address Read
The CAT24CXXX’s address counter contains the ad-
dress of the last byte accessed, incremented by one. In
other words, if the last READ or WRITE access was to
address N, the READ immediately following would ac-
cess data from address N+1. If N=E (where E=4095 for
24C323 and E=8191 for 24C643),then the counter will
‘wrap around’ to address 0 and continue to clock out
data. After the CAT24CXXX receives its slave address
information (with the R/
W
bit set to one), it issues an
acknowledge, then transmits the 8-bit byte requested.
The master device does not send an acknowledge, but
will generate a STOP condition.
Selective/Random Read
Selective/Random READ operations allow the Master
device to select at random any memory location for a
READ operation. The Master device first performs a
‘dummy’ write operation by sending the START condi-
tion, slave address and byte addresses of the location it
wishes to read. After CAT24CXXX acknowledges, the
Master device sends the START condition and the slave
address again, this time with the R/
W
bit set to one.
The CAT24CXXX then responds with its acknowledge
and sends the 8-bit byte requested. The master device
Sequential Read
The Sequential READ operation can be initiated by
either the Immediate Address READ or Selective READ
operations. After the CAT24CXXX sends the initial 8-bit
byte requested, the Master will respond with an ac
knowledge which tells the device it requires more data.
The CAT24CXXX will continue to output an 8-bit byte for
each acknowledge sent by the Master. The operation
will terminate when the Master fails to respond with an
acknowledge, thus sending the STOP condition.
The data being transmitted from CAT24CXXX is output-
ted sequentially with data from address N followed by
data from address N+1. The READ operation address
counter increments all of the CAT24CXXX address bits
so that the entire memory array can be read during one
operation. If more than E (where E= 4095 for 24C323
and E=8191 for 24C643) bytes are read out, the counter
will ‘wrap around’ and continue to clock out data bytes.
does not send an acknowledge but will generate a STOP
condition.
BUS ACTIVITY:
MASTER
SDA LINE
DATA n+x
DATA n
A
C
K
A
C
K
DATA n+1
A
C
K
S
T
O
P
N
O
A
C
K
DATA n+2
A
C
K
P
SLAVE
ADDRESS
* = Don't care bit for 24WC32
X= Don't care bit
A15–A8
SLAVE
ADDRESS
S
A
C
K
A
C
K
A
C
K
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
T
A7–A0
BYTE ADDRESS
SLAVE
ADDRESS
S
A
C
K
N
O
A
C
K
S
T
A
R
T
DATA
P
S
T
O
P
X
X
X
*
相關PDF資料 |
PDF描述 |
|---|---|
| 24C64 | 2-Wire Serial EEPROM |
| 24C640-EP | DIODE ZENER 20.0V 150MW SSMINI-2 |
| 24C640-ESN | 64K SPI Bus Serial EEPROM |
| 24C640-EST | DIODE ZENER 24V 150MW SSMINI-2 |
| 24C640-IP | DIODE ZENER 27.0V 150MW SSMINI-2 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 24C64_1 | 制造商:ESTEK 制造商全稱:ESTEK 功能描述:available in space-saving 8-lead PDIP, 8-lead SOP, and 8-lead TSSOP packages |
| 24C640-EP | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
| 24C640-ESN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
| 24C640-EST | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
| 24C640-IP | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K SPI Bus Serial EEPROM |
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