參數(shù)資料
型號: 24C64
廠商: 意法半導體
元件分類: EEPROM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS
文件頁數(shù): 6/12頁
文件大?。?/td> 84K
代理商: 24C64
CAT24C323/643
6
Advanced
Doc. No. 25084-00 12/98
Hardware Data Protection
The 24CXXX is designed with the following hardware
data protection features to provide a high degree of data
integrity.
(1) The 24CXXX features a WP pin. When WP pin is tied
high the entire memory array becomes write protected
(read only).
(2) The V
CC
sense provides write protection when V
CC
falls below the reset threshold value (V
TH
). The V
CC
lock
out inhibits writes to the serial EEPROM whenever V
CC
falls below (power down) V
TH
or until V
CC
reaches the
reset threshold (power up) V
TH
.
Reset Threshold Voltage
From the factory the 24CXXX is offered in five different
variations of reset threshold voltages. They are 4.50-
4.75V, 4.25-4.50V, 3.00-3.15V, 2.85-3.00V and 2.55-
2.70V. To provide added flexibility to design engineers
using this product, the 24CXXX is designed with an
additional feature of programming the reset threshold
voltage. This allows the user to change the existing
reset threshold voltage to one of the other four reset
threshold voltages. Once the reset threshold voltage is
selected it will not change even after cycling the power,
unless the user uses the programmer to change the
reset threshold voltage. However, the programming
function is available only through third party programmer
manufacturers. Please call Catalyst for a list of program-
mer manufacturers who support this function.
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
ACK
8TH BIT
BYTE n
SCL
SDA
Figure 3. Write Cycle Timing
START BIT
SDA
STOP BIT
SCL
Figure 4. Start/Stop Timing
tHIGH
SCL
SDA IN
SDA OUT
tLOW
tF
tLOW
tR
tBUF
tSU:STO
tSU:DAT
tHD:DAT
tHD:STA
tSU:STA
tAA
tDH
Figure 2. Bus Timing
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