參數(shù)資料
型號: 24C32AESM
英文描述: I2C Serial EEPROM
中文描述: I2C串行EEPROM的
文件頁數(shù): 5/12頁
文件大?。?/td> 177K
代理商: 24C32AESM
1999 Microchip Technology Inc.
DS21163D-page 5
24C32A
3.6
Device Addressing
A control byte is the first byte received following the
start condition from the master device. The control byte
consists of a 4-bit control code; for the 24C32A this is
set as 1010 binary for read and write (R/W) operations.
The next three bits of the control byte are the device
select bits (A2, A1, A0). They are used by the master
device to select which of the eight devices are to be
accessed. These bits are in effect the three most signif-
icant bits of the word address. The last bit of the control
byte defines the operation to be performed. When set
to a one a read operation is selected, and when set to
a zero a write operation is selected. The next two bytes
received define the address of the first data byte
(Figure 3-3). Because only A11...A0 are used, the
upper four address bits must be zeros. The most signif-
icant bit of the most significant byte of the address is
transferred first.
FIGURE 3-2:
CONTROL BYTE
ALLOCATION
R/W
A
1
0
1
0
A2
A1
A0
READ/WRITE
START
SLAVE ADDRESS
Following the start condition, the 24C32A monitors the
SDA bus checking the device type identifier being
transmitted. Upon receiving a 1010 code and appropri-
ate device select bits, the slave device outputs an
acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24C32A will select a read or
write operation.
Operation
Control
Code
1010
1010
Device Select
R/W
Read
Write
Device Address
Device Address
1
0
FIGURE 3-3:
ADDRESS SEQUENCE BIT ASSIGNMENTS
1
0
1
0
A
2
A
1
A
0
R/W
0
0
0
0
A
11
A
10
A
9
A
7
A
0
A
8
SLAVE
ADDRESS
DEVICE
SELECT
BUS
CONTROL BYTE
ADDRESS BYTE 1
ADDRESS BYTE 0
This Material Copyrighted by Its Respective Manufacturer
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