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| 型號： | 21326 |
| 英文描述： | Implementation of Write Allocate Application Note |
| 中文描述： | 在寫分配應(yīng)用執(zhí)行情況的說明 |
| 文件頁數(shù)： | 11/22頁 |
| 文件大小： | 241K |
| 代理商： | 21326 |
Programming Details
3
21326F/0—February 1999
Implementation of Write Allocate in the K86 Processors
Step 1: Determine Processor Model and Stepping
The first step in supporting the write allocate feature of the
AMD K86 processors is determining the model and stepping of
the processor.
Write Allocate
Support
Write allocate is supported on every stepping for every model
of the AMD-K6
processor. Write allocate in the AMD-K5
processor is supported only on the following models with a
stepping of 4 or greater: Models 1, 2, and 3. Use the CPUID
instruction to determine if the proper model and stepping of
the processor is present. See the
AMD
Processor Recognition
Application Note
, order# 20734 for more information.
MSR Format
After determining that the processor supports write allocate,
the next step is to configure the corresponding MSR that
enables write allocate. This MSR on the AMD-K6 processor is
the Write Handling Control Register (WHCR), which has two
formats. AMD-K6 processor Models 6 and 7 and AMD-K6-2
processor Model 8 steppings 0 through 7 use the same WHCR
format. AMD-K6-2 processor Model 8 steppings 8 through F and
AMD-K6-III processor Model 9 use a different WHCR format.
For AMD-K6 processors, go to either “Step 2: AMD-K6
Processor Models 6, 7 and AMD-K6-2 Processor Model 8/[7:0]
”
on page 3 or “Step 2: AMD-K6
-2 Processor Model 8/[F:8] and
AMD-K6-III Processor Model 9
” on page 6.
For an AMD-K5 processor Models 1, 2, or 3 with a stepping of 4
or greater, go to “Step 2: AMD-K5 Processor” on page 10.
Step 2: AMD-K6
Processor Models 6, 7 and AMD-K6-2 Processor Model
8/[7:0]
The AMD-K6 processor uses two mechanisms (programmable
within the WHCR) to determine when to perform write
allocates. A write allocate is performed when either of these
mechanisms detects that a pending write is to a cacheable area
of memory.
Before programming the WHCR or changing memory
cacheability/writeability, the BIOS must writeback and
invalidate the internal cache by using the WBINVD instruction.
In addition, the WHCR should enable the write allocate
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