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參數(shù)資料
| 型號(hào)： | 2128VL |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | 2.5V In-System Programmable SuperFAST⑩ High Density PLD |
| 中文描述： | 2.5V的在系統(tǒng)可編程超快⑩高密度可編程邏輯器件 |
| 文件頁(yè)數(shù)： | 9/17頁(yè) |
| 文件大?。?/td> | 214K |
| 代理商： | 2128VL |
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Specifications
ispLSI 2128VL
9
Signal Descriptions
RESET
GOE 0, GOE1
Y0, Y1, Y2
Active Low (0) Reset pin resets all the registers in the device.
Global Output Enable input pins.
Dedicated Clock Input
–
These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
Input
–
Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a serial data input pin
to load programming data into the device. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a clock pin for the
Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a mode control pin for
the Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Output/Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as an output pin
to read serial shift register data. When
BSCAN
is high, it functions as a dedicated input pin.
Dedicated Input Pins to the device.
Ground (GND)
Vcc
No Connect
Input/Output Pins
–
These are the general purpose I/O pins used by the logic array.
BSCAN
TDI/IN 0
TCK/IN 3
TMS/IN 1
TDO/IN 2
IN 4 - IN 7
GND
VCC
NC
1
I/O
Signal Name Description
1. NC pins are not to be connected to any active signals, VCC or GND.
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