- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368821 > 20381 Magic Packet Technology Application in Hardware and Software? - (PDF) PDF資料下載
參數(shù)資料
| 型號： | 20381 |
| 英文描述： | Magic Packet Technology Application in Hardware and Software? - (PDF) |
| 中文描述： | 魔包技術(shù)在硬件和軟件？ - （PDF格式） |
| 文件頁數(shù)： | 4/29頁 |
| 文件大?。?/td> | 86K |
| 代理商： | 20381 |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
4
Magic Packet Technology Application in Hardware and Software
tied to one of the backplane VCC pins and provides a
sense condition for the backplane power).
The equation SEC_RESET_OK is used to provide a
state of indication between the power down and the re-
power up due to the presence of a Magic Packet frame.
The first and the third terms are used in the event that
someone uses the power switch on the front panel,
rather than at the arrival of a Magic Packet frame. The
second term is used if a Magic Packet arrives and is in-
dicated by LED3. LED3 will go away on a Magic Packet
arrival condition after power comes up and the
RESET_IN is allowed to go the RESET_TO_CHIP
through the third term of RESET_TO_CHIP.
The equation LED3_OUT is used to both invert the po-
larity of the LED output driver as well as AND the indi-
cation of a Magic Packet frame’s presence with the
state of backplane VCC. The polarity is dictated by the
system vendor and the spare output may also be used
to generate the negative true output for those systems
that would prefer that condition.
Appendix A gives the equations for an implementation
using the PCnet-ISA II controller. The PCnet-PCI II
controller is similar but has some differences. Because
of the architecture of the PCnet-PCI II part, the LED
pins are multiplexed with the EEPROM pins. The equa-
tions applicable to PCnet-PCI II are given in Appendix
B. The timing for the PCI version is shown in Figure 3.
PCnet Issues
After these PAL discussions, the issue of having the
PCnet controller’s I/O pins driving the backplane bus
while power is down on the motherboard must be ad-
dressed. The PCnet-ISA II controller only has one ac-
tively driven high non-tristated output on the DREQ pin
selected. Since the current for this pin is limited, the
only issue will be the small amount of extra current
drawn on the auxiliary power supply.
The PCnet-PCI II does not have the same issues as the
PCnet-ISA. When the MAC is put into Magic Packet
mode, all bus interface output pins are placed into High
Z. The expansion ROM pins are not tristated so an ex-
pansion ROM must also be powered off the auxiliary
power supply. However, the PCnet-PCI II does have
one other consideration. That is, this controller has two
sets of power pins, one for the core and the other for the
I/O buffers. This was done to support both 5-V PCI bus
interface and 3.3-V PCI interface by connecting the Vio
pins of the PCI bus interface to the Vbuffer pins on the
PCnet-PCI II controller. These power pins were de-
signed to never have to go below 3.0 V in a working
system. However, when a motherboard powers down,
these pins will go to 0 V. This can cause internal break-
down on the chip, so the voltage (Vbuffer) pins must be
connected to the auxiliary power supply. This implies
that this card design will not support a 3.3-V PCI bus.
SOFTWARE
The software issues of interfacing the network drivers
and Magic Packet code with the operating system will
be discussed in this section. The only demonstrable
code working today is in the DOS and Windows 3.1/
Windows for Workgroups 3.11 environment. OS2 and
other environments, probably with similar implementa-
tion schemes, will not be discussed here.
The power management standard in a DOS system
was established by Microsoft and Intel by way of the
Advanced Power Management (APM) Specification. In
the APM specification, some system interrupts were
established to inform the necessary drivers needing
the information that the system is preparing for power
down or going to resume from a power down state. Un-
fortunately, by the time the APM specification was cre-
ated, all the interrupts DOS was using were already
taken. Therefore, interrupt 2F was chosen to be the
APM interrupt. Interrupt 2F had been the catchall for
miscellaneous interrupts, so that any driver associating
with this interrupt has to check to see if this interrupt is
even available for its use. Therefore, it is this interrupt
that will be used in the DOS-based Terminate Stay
Resident (TSR) driver. Appendix C shows the DOS
TSR developed to do the interface between DOS and
the PCnet controller and the network driver.
In the way the operating system and the network driv-
ers work, the APM is unknown to the network stack.
This may change in the future, but for now the real in-
terface will be between the operating system and the
hardware itself. Once loaded, the network driver oper-
ates strictly off interrupts, so that if there are no inter-
rupts it simply is asleep and waiting. The hardware is
set up by the driver to generate interrupts only for the
receive activity. The transmit activity is initiated by a
system call to the disk redirector, which eventually fil-
ters down to a call to the transmit routine. Therefore, if
the system goes to sleep, there will be no redirection
effort, because no programs will be running. If the
PCnet hardware is put in the suspend mode before
being put into Magic Packet mode, then any receive ac-
tivity will be used for Magic Packet detection only.
Because of this independence between the Magic
Packet TSR driver and the network driver, it was de-
cided to treat them as separate entities. The advan-
tage is that both programs can be independently
revised as needed. In addition, the TSR is written so
that it can be loaded in any order with respect to the
network driver, and both can coexist. If the TSR is
loaded without the network driver, then the Magic
Packet functionality will not work, because the MAC is
never initialized and enabled, and there is no damage
done to the operating system or the operation of the
base system.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 2040.2031 | *LED PCB MT.RED X 4 |
| 20402 | MARKER PAINT WHITE |
| 2041-6201-00 | WIRE,24,SOL,BARE,ROHS |
| 2041-6204-00 | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT01; Number of Contacts:5; Connector Shell Size:14; Connecting Termination:Solder; Circular Shell Style:Cable Receptacle |
| 2041 | Unmatched Tees Non-Isolated |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 20381-005 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 20381-08-30-R-P | 制造商:TE Connectivity 功能描述: |
| 20381101501 | 制造商:Varta 功能描述:BATTERY S/OXIDE 1.55V 45MAH V381 制造商:Varta 功能描述:BATTERY, S/OXIDE, 1.55V, 45MAH, V381 制造商:Varta 功能描述:BATTERY, S/OXIDE, 1.55V, 45MAH, V381; Battery Size Code:SR55; Battery Capacity:45mAh; Battery Voltage:1.55V; Battery Technology:Silver Oxide; Battery Terminals:Flat Top; External Diameter:11.6mm; External Height:2.1mm; Weight:0.9g; ;RoHS Compliant: NA |
| 2038-110-SM | 功能描述:氣體放電管 - GDT /氣體等離子體避雷器 Mini Trigard Symmetrical SMT RoHS:否 制造商:Bourns 峰值脈沖電流: 直流擊穿電壓（標(biāo)稱）:4500 V 電極數(shù)量:2 系列:SA2 端接類型:Axial 故障安全保護 Y/N: 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。