參數(shù)資料
型號： 100LVEL11M
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 時鐘及定時
英文描述： 3.3V ECL 1:2 Differential Fanout Buffer
中文描述： 100LVEL SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封裝： 0.150 INCH, MS-012, SOIC-8
文件頁數(shù)： 3/6頁
文件大小： 131K
代理商： 100LVEL11M
3
www.fairchildsemi.com
1
LVNECL DC Electrical Characteristics
V
CC
=
0.0V; V
EE
=
3.3V (Note 6)
Note 6:
Input and output parameters vary 1 to 1 with V
CC
. V
EE
can vary
±
0.3V.
Note 7:
Outputs are terminated through a 50
Resistor to V
CC
2.0V.
Note 8:
V
IHCMR
minimum varies 1-to-1 with V
EE
. V
IHCMR
maximum varies 1 to 1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the
differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PPMIN
and
1V.
Note 9:
Absolute value of the input HIGH and LOW current should not exceed the absolute value of the stated Min or Max specification.
Note:
Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than
500LFPM maintained.
AC Electrical Characteristics
V
CC
=
3.3V; V
EE
=
0.0V or V
CC
=
0.0V; V
EE
=
3.3V (Note 10)(Note 11)
Note 10:
V
EE
can vary
±
0.3V.
Note 11:
Measured using a 750 mV input swing centered at V
CC
1.32V; 50% duty cycle clock source; t
r
=
t
f
=
250 ps (20% - 80%) at f
IN
=
1 MHz. All loading
with 50
to V
CC
2.0V.
Note 12:
Within-device skew defined as identical transitions on similar paths through a device.
Note 13:
Duty cycle skew is the difference between a t
PLH
and t
PHL
propagation delay through a device under identical conditions.
Symbol
Parameter
40
°
C
Typ
24
1005
1695
25
°
C
Typ
24
955
1705
85
°
C
Typ
25
955
1705
Units
Min
Max
28
880
1555
880
1475
Min
Max
28
880
1620
880
1475
Min
Max
30
880
1620
880
-1475
I
EE
V
OH
V
OL
V
IH
V
IL
V
IHCMR
Power Supply Current
Output HIGH Voltage (Note 7)
mA
mV
1085
1830
1165
1810
1025
1810
1165
1810
1025
1810
1165
1810
Output LOW Voltage (Note 7)
Input HIGH Voltage (Single Ended)
Input LOW Voltage (Single Ended)
mV
mV
mV
Input HIGH Voltage Common Mode
Range (Differential) (Note 8)
V
PP
<
500mV
V
PP
≥
500mV
2.1
1.9
0.2
0.2
150
2.2
2.0
0.2
0.2
150
2.2
2.0
0.2
0.2
150
V
I
IH
I
IL
Input HIGH Current (Note 9)
Input LOW Current (Note 9)
μ
A
D
0.5
600
0.5
600
0.5
600
μ
A
D
Symbol
Parameter
40
°
C
Typ
25
°
C
Typ
85
°
C
Typ
Units
Figure
Number
Min
1
215
Max
Min
1
235
Max
Min
1
250
Max
f
MAX
t
PLH
, t
PHL
t
SKEW
Maximum Toggle Frequency
Propagation Delay to Output
GHz
ps
385
330
405
435
Figure 1
Within Device Skew (Note 12)
Duty Cycle Skew (Note 13)
Cycle-to-Cycle Jitter
5
5
20
20
5
5
20
20
5
5
20
20
ps
t
JITTER
V
PP
t
r
, t
f
TBD
TBD
TBD
Input Swing
Output Rise Times Q (20% to 80%)
200
120
1000
320
200
120
1000
320
200
120
1000
320
mV
ps
Figure 1
Figure 2
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