參數(shù)資料
型號(hào): 100354QC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Power 8-Bit Register with Cut-Off Drivers
中文描述: 100K SERIES, 8-BIT DRIVER, TRUE OUTPUT, PQCC28
封裝: 0.450 X 0.450 INCH, PLASTIC, MO-047, LCC-28
文件頁(yè)數(shù): 4/9頁(yè)
文件大?。?/td> 91K
代理商: 100354QC
www.fairchildsemi.com
4
1
Commercial Version
(Continued)
DIP AC Electrical Characteristics
V
EE
=
4.2V to
5.7V, V
CC
=
V
CCA
=
GND
Note 4:
The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
PLCC AC Electrical Characteristics
V
EE
=
4.2V to
5.7V, V
CC
=
V
CCA
=
GND
Note 5:
The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
Note 6:
Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (t
OSHL
), or LOW-to-HIGH (t
OSLH
), or in opposite
directions both HL and LH (t
OST
). Parameters t
OST
and t
PS
guaranteed by design.
Symbol
Parameter
T
C
=
0
°
C
Min
250
T
C
=
+
25
°
C
Min
250
T
C
=
+
85
°
C
Min
250
Units
Conditions
Max
Max
Max
f
MAX
t
PLH
t
PHL
t
PZH
t
PHZ
t
TLH
t
THL
t
S
Toggle Frequency
Propagation Delay
MHz
Figures 1, 4
Figures 1, 4
1.40
3.00
1.40
3.00
1.50
3.10
ns
CP to Output
Propagation Delay
OEN to Output
(Note 4)
Figures 3, 7
(Note 4)
1.60
1.00
4.20
2.70
1.60
1.00
4.20
2.70
1.60
1.00
4.20
2.70
ns
Transition Time
20% to 80%, 80% to 20%
Setup Time
0.45
2.00
0.45
2.00
0.45
2.00
ns
Figures 1, 4
D
n
CEN (Disable Time)
CEN (Release Time)
1.10
0.40
1.10
1.10
0.40
1.10
1.10
0.40
1.10
ns
Figures 2, 5
t
H
Hold Time
0.10
0.10
0.10
ns
Figures 1, 6
D
n
t
PW
(H)
Pulse Width HIGH
2.00
2.00
2.00
ns
Figures 1, 4
CP
Symbol
Parameter
T
C
=
0
°
C
Min
250
T
C
=
+
25
°
C
Min
250
T
C
=
+
85
°
C
Min
250
Units
Conditions
Max
Max
Max
f
MAX
t
PLH
t
PHL
t
PZH
t
PHZ
t
TLH
t
THL
t
S
Toggle Frequency
MHz
Figures 1, 4
Propagation Delay
CP to Output
Propagation Delay
1.40
2.80
1.40
2.80
1.50
2.90
ns
Figures 1, 4
(Note 5)
Figures 3, 7
1.60
4.00
1.60
4.00
1.60
4.00
ns
OEN to Output
Transition Time
20% to 80%, 80% to 20%
1.00
2.50
1.00
2.50
1.00
2.50
(Note 5)
0.45
1.90
0.45
1.90
0.45
1.90
ns
Figures 1, 4
Setup Time
D
n
CEN (Disable Time)
1.00
0.30
1.00
0.30
1.00
0.30
ns
Figures 2, 5
CEN (Release Time)
Hold Time
1.00
1.00
1.00
t
H
0.00
0.00
0.00
ns
Figures 1, 6
D
n
t
PW
(H)
Pulse Width HIGH
2.00
2.00
2.00
ns
Figures 1, 4
CP
t
OSHL
Maximum Skew Common Edge
Output-to-Output Variation
Clock to Output Path
Maximum Skew Common Edge
280
280
280
ps
(Note 6)
t
OSLH
Output-to-Output Variation
Clock to Output Path
Maximum Skew Opposite Edge
340
340
340
ps
(Note 6)
t
OST
Output-to-Output Variation
Clock to Output Path
Maximum Skew
340
340
340
ps
(Note 6)
t
PS
Pin (Signal) Transition Variation
Clock to Output Path
250
250
250
ps
(Note 6)
相關(guān)PDF資料
PDF描述
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