AMIS-42770 Dual High-Speed CAN Transceiver
Data Sheet
For Long Networks
8.0 E l ec tr ic al C h ar ac ter i s t i c s
8.1 Definitions
All voltages are referenced to GND. Positive currents flow into the IC. Sinking current means that the current is flowing into the
pin. Sourcing current means that the current is flowing out of the pin.
8.2 Absolute Maximum Ratings
Stresses above those listed in
Table 4 may cause permanent device failure. Exposure to absolute maximum ratings for extended
periods may affect device reliability.
Table 4: Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min.
Max.
Unit
VCC
Supply voltage
-0.3
+7
V
VCANHx
DC voltage at pin CANH1/2
0 < VCC < 5.25V; no time limit
-45
+45
V
VCANLx
DC voltage at pin CANL1/2
0 < VCC < 5.25V; no time limit
-45
+45
V
VdigIO
DC voltage at digital IO pins (EN1B, EN2B, Rint, Rx0,
Text, Tx0)
-0.3
VCC + 0.3
V
VREF
DC voltage at pin VREF
-0.3
VCC + 0.3
V
Vtran(CANHx)
Transient voltage at pin CANH1/2
Note 1
-150
+150
V
Vtran(CANLx)
Transient voltage at pin CANL1/2
Note 1
-150
+150
V
Vesd(CANLx/CANHx)
ESD voltage at CANH1/2 and CANL1/2 pins
Note 2
Note 4
-4
-500
+4
+500
kV
V
Vesd
ESD voltage at all other pins
Note 2
Note 4
-2
-250
+2
+250
kV
V
Latch-up
Static latch-up at all pins
Note 3
100
mA
Tstg
Storage temperature
-55
+155
°C
Tamb
Ambient temperature
-40
+125
°C
Tjunc
Maximum junction temperature
-40
+150
°C
Notes:
(1) Applied transient waveforms in accordance with “ISO 7637 part 3”, test pulses 1, 2, 3a, and 3b (see
Figure 6).(2) Standardized human body model (HBM) ESD pulses in accordance to MIL883 method 3015. Supply pin 8 is
±2 kV.
(3) Static latch-up immunity: static latch-up protection level when tested according to EIA/JESD78.
(4) Standardized charged device model ESD pulses when tested according to EOS/ESD DS5.3-1993.
8.3 Thermal Characteristics
Table 5: Thermal Characteristics
Symbol
Parameter
Conditions
Value
Unit
Rth(vj-a)
Thermal resistance from junction to ambient in SO20 package
In free air
85
K/W
Rth(vj-s)
Thermal resistance from junction to substrate of bare die
In free air
45
K/W
AMI Semiconductor
– October 2007, Rev. 1.0
9
www.amis.com
Specifications subject to change without notice