23
CHAPTER 1 GENERAL
Table 1-8. Functional Outline of
μ
PD780024 Subseries
Part Number
Item
Mask ROM
8K bytes
16K bytes
24K bytes
32K bytes
512 bytes
1024 bytes
64K bytes
8 bits
×
8
×
4 banks
0.24
μ
s/0.48
μ
s/0.95
μ
s/1.91
μ
s/3.81
μ
s (at 8.38 MHz)
122
μ
s (at 32.768 kHz)
16-bit operation
Multiplication/division (8 bits
×
8 bits, 16 bits
÷
8 bits)
Bit manipulation (set, reset, test, Boolean operation)
BCD adjustment, etc.
Total
CMOS input
CMOS I/O
(On-chip pull-up resistor ON/OFF selected by software
N-ch open drain I/O
(5-V withstand, pull-up resistor connected by mask option
: 51
: 8
: 39
: 39)
: 4
: 4)
8-bit resolution
×
8 channels
Low-voltage operation : AV
DD
= 1.8 to 5.5 V
3-wire serial I/O mode : 2 channels
UART mode
: 1 channel
16-bit timer/event counter : 1 channel
8-bit timer/event counter : 2 channels
Watch timer
Watchdog timer
: 1 channel
: 1 channel
3 (8-bit PWM output: 2)
131 kHz, 262 kHz, 524 kHz, 1.05 MHz, 2.10 MHz, 4.19 MHz, 8.38 MHz (with main system clock
of 8.38 MHz), 32.768 kHz (with subsystem clock of 32.768 kHz)
65.5 kHz, 1.02 kHz, 2.05 kHz, 4.10 kHz, 8.19 kHz (with main system clock of 8.38 MHz)
Internal: 13, external: 5
Internal: 1
1
V
DD
= 1.8 to 5.5 V
T
A
= –40 to +85
°
C
64-pin plastic shrink DIP (750 mil)
64-pin plastic QFP (14
×
14 mm)
64-pin plastic LQFP (12
×
12 mm)
Caution The
μ
PD780024 subseries is under development.
ROM
High-speed RAM
Memory space
General-purpose register
Minimum
With main
instruction
system clock
execution With subsystem
time
clock
Instruction set
I/O port
A/D converter
Serial interface
Timer
Timer output
Clock output
Buzzer output
Vectored
Maskable
interrupt
Non-maskable
source
Software
Supply voltage
Operating temperature
Package
Internal
memory
μ
PD780021
μ
PD780022
μ
PD780023
μ
PD780024