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CHAPTER 14 A/D CONVERTER
14.4 Operation of A/D Converter
14.4.1 Basic operation of A/D converter
<1> Set the number of analog input channels by using the A/D converter input select register (ADIS).
<2> Select one channel for A/D conversion by using the A/D converter mode register (ADM) from the channels
set as analog inputs by ADIS.
<3> The voltage input to the selected analog input channel is sampled by the sample and hold circuit.
<4> When the voltage has been sampled for a specific time, the sample and hold circuit enters the hold status,
and holds the input analog voltage until A/D conversion is completed.
<5> Bit 7 of the successive approximation register (SAR) is set. The tap selector selects (1/2)AV
REF
as the voltage
tap of the series resistor string.
<6> The voltage difference between the voltage tap of the series resistor string and the analog input is compared
by the voltage comparator. If the analog input is higher than (1/2)AV
REF
, the MSB of SAR remains set. If
it is less than (1/2)AV
REF
, the MSB is reset.
<7> Next, bit 6 of SAR is automatically set, and the next voltage difference is compared. Here the voltage tap
of the series resistor string is selected as follows, according to the value of bit 7 to which the result of the
first comparison has been already set.
Bit 7 = 1 : (3/4)AV
REF
Bit 7 = 0 : (1/4)AV
REF
This voltage tap and analog input voltage are compared, and bit 6 of SAR is manipulated as follows, according
to the result of the comparison:
Analog input voltage
≥
voltage tap : bit 6 = 1
Analog input voltage < voltage tap : bit 6 = 0
<8> In this way, all the bits of SAR, including bit 0, are compared.
<9> When all the 8 bits of SAR have been compared, SAR holds the valid digital result whose values are
transferred and latched to the A/D conversion result register (ADCR).
At the same time, an A/D conversion end interrupt request (INTAD) can be generated.