CHAPTER 20 STANDBY FUNCTION
20.1 Standby Function and Configuration
20.1.1 Standby function
The standby function is to reduce the power consumption of the system and can be effected in the following two
modes:
(1) HALT mode
This mode is set when the HALT instruction is executed. The HALT mode stops the operation clock of the
CPU. The system clock oscillation circuit continues oscillating. This mode does not reduce the current
consumption as much as the STOP mode, but is useful for resuming processing immediately when an interrupt
request is generated, or for intermittent operations such as a watch operation.
(2) STOP mode
This mode is set when the STOP instruction is executed. The STOP mode stops the main system clock
oscillation circuit and stops the entire system. The current consumption of the CPU can be substantially
reduced in this mode.
The low voltage (V
DD
= 1.8 V) of the data memory can be retained. Therefore, this mode is useful for retaining
the contents of the data memory at an extremely low current.
The STOP mode can be released by an interrupt request, so that this mode can be used for the intermittent
operation. However, certain time is required until the system clock oscillation circuit stabilizes after the STOP
mode has been released. If processing must be resumed immediately by using an interrupt request, therefore,
use the HALT mode.
In both modes, the previous contents of the registers, flags, and data memory before setting the standby mode
are all retained. In addition, the statuses of the output latch of the I/O ports and output buffer are also retained.
Cautions 1. The STOP mode can be used only when the system operates on the main system clock (this
mode cannot be used to stop the oscillation of the subsystem clock). The HALT mode can
be used regardless of whether the system operates on the main system clock or subsystem
clock.
2. To set the STOP mode, be sure to stop the operations of the peripheral hardware, and then
execute the STOP instruction.
3. To reduce the power consumption of the A/D converter, clear bit 7 (CS) of A/D converter mode
register (ADM) to 0 to stop the A/D conversion, and then execute the HALT or STOP
instruction.
439