15
CHAPTER 1 GENERAL
Table 1-5. Functional Outline of
μ
PD78018F Subseries (1/2)
Part Number
Item
Mask ROM
PROM
8K bytes
16K bytes
24K bytes
32K bytes
40K bytes
48K bytes
60K bytes
60K bytes
Note 1
512 bytes
1024 bytes
1024 bytes
Note 1
None
512 bytes
1024 bytes
1024 bytes
Note 2
32 bytes
64K bytes
8 bits
×
8
×
4 banks
0.4
μ
s/0.8
μ
s/1.6
μ
s/3.2
μ
s/6.4
μ
s (at 10.0 MHz)
122
μ
s (at 32.768 kHz)
16-bit operation
Multiplication/division (8 bits
×
8 bits, 16 bits
÷
8 bits)
Bit manipulation (set, reset, test, Boolean operation)
BCD adjustment, etc.
Total
CMOS input
CMOS I/O
(On-chip pull-up resistor ON/OFF selected by software : 47)
N-ch open drain I/O : 4
(15-V withstand, pull-up resistor connected by mask option : 4)
: 53
: 2
: 47
8-bit resolution
×
8 channels
Low-voltage operation : AV
DD
= 1.8 to 5.5 V
3-wire serial I/O/SBI/2-wire serial I/O mode selectable
3-wire serial I/O mode (with function to automatically transfer/receive up to 32 bytes) : 1 channel
: 1 channel
16-bit timer/event counter : 1 channel
8-bit timer/event counter : 2 channels
Watch timer
Watchdog timer
: 1 channel
: 1 channel
3 (14-bit PWM output: 1)
39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz (with main system clock of 10.0
MHz), 32.768 kHz (with subsystem clock of 32.768 kHz)
Notes 1.
The capacities of the internal PROM and internal high-speed RAM can be changed by using a memory
size select register (IMS).
2.
The internal expansion RAM capacity can be changed by using an internal expansion RAM size select
register (IXS).
ROM
High-speed RAM
Expansion RAM
Buffer RAM
Memory space
General-purpose register
Minimum
With main
instruction
system clock
execution With subsystem
time
clock
Instruction set
I/O port
A/D converter
Serial interface
Timer
Timer output
Clock output
μ
PD78011F
μ
PD78012F
μ
PD78013F
μ
PD78014F
μ
PD78015F
μ
PD78016F
μ
PD78018F
μ
PD78P018F
Internal
memory