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CHAPTER 16 SERIAL INTERFACE CHANNEL 0 (
μ
PD78018FY SUBSERIES)
(1) Functions in the I
2
C bus mode
The following functions are available in the I
2
C bus mode:
(a) Automatic identification of serial data
The “start condition”, “data”, and “stop condition” on the serial data bus are automatically detected.
(b) Chip select by address
The master can select a specific slave device from those connected to the I
2
C bus by transmitting a slave
address and communicate with that slave.
(c) Wake-up function
When a slave operates, it generates an interrupt request when the address it has received from the master
coincides with the value of the slave address register (SVA) (the interrupt request is generated also when
the stop condition is detected). Therefore, the slaves on the I
2
C bus other than the one selected by the
master can operate independently of the serial communication.
(d) Acknowledge signal (ACK) control function
The acknowledge signal that is used to check whether serial communication has been correctly executed
can be controlled during the master and slave operations.
(e) Wait signal (WAIT) control function
A slave device can control the wait signal that indicates the busy status of the slave.
(2) Definition of the I
2
C bus
The following describes the serial data communication format of the I
2
C bus and the meanings of the signals
used.
Figure 16-13 shows the transfer timing of the “start condition”, “data”, and “stop condition”output to the I
2
C
serial data bus.
Figure 16-13. Serial Data Transfer Timing on I
2
C Bus
The start condition, slave address, and stop condition are output by the master.
The acknowledge signal (ACK) is output by either the master or slave (usually, this signal is output by the
side that receives 8-bit data).
The serial clock (SCL) is continuously output by the master.
SCL
SDA0
(SDA1)
1-7
8
9
1-7
8
9
1-7
8
9
Start
condition
Address
R/W
ACK
Data
ACK
Data
ACK
Stop
condition