26
LIST OF FIGURES (3/7)
Figure No.
Title
Page
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
9-13
9-14
9-15
9-16
Format of 8-Bit Timer Mode Control Register ....................................................................
Format of 8-Bit Timer Output Control Register ..................................................................
Format of Port Mode Register 3..........................................................................................
Interval Timer Operation Timing..........................................................................................
External Event Counter Operation Timing (with rising edge specified) ............................
Square Wave Output Operation ..........................................................................................
Interval Timer Operation Timing..........................................................................................
External Event Counter Operation Timing (with rising edge specified) ............................
Square Wave Output Operation ..........................................................................................
Start Timing of 8-Bit Timer Register ...................................................................................
External Event Counter Operation Timing ..........................................................................
Timing after Changing Values of Compare Registers during Timer Count Operation .....
208
209
210
211
213
214
215
217
218
219
219
220
10-1
10-2
10-3
Block Diagram of Watch Timer............................................................................................
Format of Timer Clock Select Register 2............................................................................
Format of Watch Timer Mode Control Register..................................................................
223
224
225
11-1
11-2
11-3
Block Diagram of Watchdog Timer .....................................................................................
Format of Timer Clock Select Register 2............................................................................
Format of Watchdog Timer Mode Register.........................................................................
231
233
234
12-1
12-2
12-3
12-4
Application Example of Remote Controller Output.............................................................
Block Diagram of Clock Output Control Circuit ..................................................................
Format of Timer Clock Select Register 0............................................................................
Format of Port Mode Register 3..........................................................................................
237
238
239
240
13-1
13-2
13-3
Block Diagram of Buzzer Output Control Circuit ................................................................
Format of Timer Clock Select Register 2............................................................................
Format of Port Mode Register 3..........................................................................................
241
243
244
14-1
14-2
14-3
14-4
14-5
14-6
14-7
14-8
14-9
14-10
14-11
Block Diagram of A/D Converter .........................................................................................
Format of A/D Converter Mode Register ............................................................................
Format of A/D Converter Input Select Register..................................................................
Basic Operation of A/D Converter.......................................................................................
Relations between Analog Input Voltage and A/D Conversion Result..............................
A/D Conversion by Hardware Start .....................................................................................
A/D Conversion by Software Start ......................................................................................
Example of Reducing Current Consumption in Standby Mode .........................................
Processing Analog Input Pin ...............................................................................................
A/D Conversion End Interrupt Generation Timing..............................................................
Processing of AV
DD
Pin........................................................................................................
246
249
250
252
253
254
255
256
257
258
258
15-1
15-2
Block Diagram of Serial Interface Channel 0 .....................................................................
Format of Timer Clock Select Register 3............................................................................
262
266