參數(shù)資料
型號： ZL50019GAC
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Enhanced 2 K Digital Switch with Stratum 4E DPLL
中文描述： TELECOM, DIGITAL TIME SWITCH, PBGA256
封裝： 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MS-034, BGA-256
文件頁數(shù)： 1/115頁
文件大?。?/td> 866K
代理商： ZL50019GAC
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.
Features
2048 channel x 2048 channel non-blocking digital
Time Division Multiplex (TDM) switch at 8.192
and 16.384 Mbps or using a combination of ports
running at 2.048, 4.096, 8.192 and 16.384 Mbps
32 serial TDM input, 32 serial TDM output
streams
Integrated Digital Phase-Locked Loop (DPLL)
exceeds Telcordia GR-1244-CORE Stratum 4E
specifications
Output clocks have less than 1 ns of jitter (except
for the 1.544 MHz output)
DPLL provides holdover, freerun and jitter
attenuation features with four independent
reference source inputs
Exceptional input clock cycle to cycle variation
tolerance (20 ns for all rates)
Output streams can be configured as bi-
directional for connection to backplanes
Per-stream input and output data rate conversion
selection at 2.048, 4.096, 8.192 or 16.384 Mbps.
Input and output data rates can differ
Per-stream high impedance control outputs
(STOHZ) for 16 output streams
Per-stream input bit delay with flexible sampling
point selection
October 2004
Ordering Information
ZL50019GAC 256-ball PBGA
ZL50019QCC 256-lead LQFP
-40
°
C to +85
°
C
ZL50019
Enhanced 2 K Digital Switch with
Stratum 4E DPLL
Data Sheet
Figure 1 - ZL50019 Functional Block Diagram
Data Memory
Internal Registers &
Microprocessor Interface
Output HiZ
Control
Test Port
OSC
DPLL
S/P Converter
STOHZ[15:0]
FPo[3:0]
CKo[5:0]
FPo_OFF[2:0]
STio[31:0]
REF0
REF1
REF2
REF3
O
O
Connection Memory
M
D
C
D
A
T
T
T
T
T
Output Timing
STi[31:0]
REF_FAIL0
REF_FAIL1
REF_FAIL2
REF_FAIL3
I
P/S Converter
D
R
OSC_EN
Input Timing
FPi
CKi
MODE_4M0
MODE_4M1
ODE
RESET
V
SS
V
DD_IO
V
DD_CORE
V
DD_IOA
V
DD_COREA
Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912,
France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08
相關PDF資料
PDF描述
ZL50019QCC Enhanced 2 K Digital Switch with Stratum 4E DPLL
ZL50022 Enhanced 4 K Digital Switch with Stratum 4E DPLL
ZL50022GAC Enhanced 4 K Digital Switch with Stratum 4E DPLL
ZL50022QCC Enhanced 4 K Digital Switch with Stratum 4E DPLL
ZL50023 Enhanced 4 K Digital Switch
相關代理商/技術參數(shù)
參數(shù)描述
ZL50019GAG2 制造商:Microsemi Corporation 功能描述:PB FREE 2K WITH RATE CONVERSION+S4E DPLL 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K 1.8V/3.3V 256BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 2K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 2K-CH ENH 256PBGA
ZL50019QCC 制造商:Microsemi Corporation 功能描述:2K WITH RATE CONVERSION AND S4 - Trays
ZL50019QCG1 制造商:Microsemi Corporation 功能描述:PB FREE 2K WITH+CONVERSION AND S4E DPLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 2K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 2K-CH ENH 256LQFP
ZL50020 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 2 K Digital Switch
ZL50020GAC 制造商:Microsemi Corporation 功能描述:2K WITH RATE CONVERSION - Trays
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