參數(shù)資料
型號(hào)： YSS912F
英文描述： Stratix GX FPGA 25K 16-FBGA
中文描述： 消費(fèi)性IC
文件頁(yè)數(shù)： 22/32頁(yè)
文件大?。?/td> 802K
代理商： YSS912F
YSS915
29
A procedure to change Normal mode to Through mode
Normal mode means that it can apply the sound effect using internal DSP function and the sampling frequency is
between 32kHz and 48kHz in this mode.
Through mode means that the digital input data fed to YSS915 is bypassed to digital output pin without processing
by DSP and the sampling frequency is 64kHz to 96kHz.
For example, when the sampling frequency is changed from 48kHz( called fs-single) to 96kHz( called fs-double),
master clock frequency fed to XI pin of YSS915 may be changed according to the fs(sampling frequency).
In this case please refer to the following procedure.
A. Change Normal mode (fs-single) to Through mode (fs-double)
1.Mute Analog output of the product
2.Set /IC=”0” of YSS915
3.Change the master clock frequency (XI of YSS915) from “single “ to “double”
4.Wait 2msec or more
5.Set /IC=”1”
6.Set the parameters from the microprocessor to YSS915 as followed
opr [7:0] = 8’bxx00x0x1
mdr [7:0] = 8’b01100000
dar [7:0] = 8’b10xx01xx
or
8’b10xx10xx
or
8’b10xx11xx
x means don’t care
7.Disable to mute Analog output of the product
B. Change Through mode (fs-double) to Normal mode (fs-single)
1.Mute Analog output of the product
2.Set /IC=”0” of YSS915
3.Change the master clock frequency (XI of YSS915) from “double“ to “single”
4.Wait 2msec or more
5.Set /IC=”1”
6.Set the parameters from the microprocessor to YSS915 as the same way after power on
2msec min
mute
Mute of Analog out
/IC of YSS915
XI of YSS915
Setting from microprocessor
to YSS915
single
double
setting
2msec min
mute
Mute of Analog out
/IC of YSS915
XI of YSS915
Setting from microprocessor
to YSS915
double
single
setting
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參數(shù)描述
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