
XRT73R12
49
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.3
NOTE: 1. This timing parameter is based on the frequency of the synchronous clock (PCLK). To determine the access
time, use the following formula: (PCLKperiod * 2) + 5ns
7.3
Register Map
TABLE 17: COMMAND REGISTER ADDRESS MAP, WITHIN THE XRT73R12
ADDRESS
(HEX)
COMMAND REGISTER
(DECIMAL)
LABEL
TYPE
REGISTER NAME
0x00
CR0
APST
R/W
APS Transmit Redundancy Control Register 0-5
CHANNEL 0 CONTROL REGISTERS
0x01
CR1
IER0
R/W
Source Level Interrupt Enable Register - Ch 0
0x02
CR2
ISR0
RUR
Source Level Interrupt Status Register Ch 0
0x03
CR3
AS0
R/O
Alarm Status Register - Ch 0
0x04
CR4
TC0
R/W
Transmit Control Register - Ch 0
0x05
CR5
RC0
R/W
Receive Control Register - Ch 0
0x06
CR6
CC0
R/W
Channel Control Register - Ch 0
0x07
CR7
Reserved
0x08
CR8
APSR
R/W
APS Receive Redundancy Control Register 0-5
0x09
0x0A
CR10
EM0
R/W
Error counter MS Byte Ch 0
0x0B
CR11
EL0
R/W
Error counter LS Byte
0x0C
CR12
EH0
R/W
Error counter Holding register
0x0D
0x0E
0x0F
0x10
CHANNEL 1 CONTROL REGISTERS
0x11
CR17
IER1
R/W
Source Level Interrupt Enable Register - Ch 1
0x12
CR18
ISR1
RUR
Source Level Interrupt Status Register - Ch 1
0x13
CR19
AS1
R/O
Alarm Status Register - Ch 1
0x14
CR20
TC0
R/W
Transmit Control Register - Ch 1
0x15
CR21
RC1
R/W
Receive Control Register - Ch 1
0x16
CR22
CC1
R/W
Channel Control Register - Ch 1
0x17
CR23
Reserved
0x18
0x19
0x1A
CR26
EM1
R/W
Error counter MSByte Ch 1