參數(shù)資料
型號: W83697UF
英文描述: W83697F plus 2 Extra UART (total 4 UART)
中文描述: W83697F加2額外的UART(共4 UART)的
文件頁數(shù): 11/78頁
文件大?。?/td> 475K
代理商: W83697UF
W83697UF
Publication Release Date: Dec.2002
Revision 1.0
- 7 -
INtp3
3.3V TTL level input pin
INtd
TTL level input pin with internal pull down resistor
INtu
TTL level input pin with internal pull up resistor
INts
TTL level Schmitt-trigger input pin
INtsp3
3.3V TTL level Schmitt-trigger input pin
INc
CMOS level input pin
INcu
CMOS level input pin with internal pull up resistor
INcd
CMOS level input pin with internal pull down resistor
INcs
CMOS level Schmitt-trigger input pin
INcsu
CMOS level Schmitt-trigger input pin with internal pull up resistor
1.1 LPC Interface
SYMBOL
PIN
I/O
FUNCTION
CLKIN
17
IN
tp3
System clock input. According to the input frequency 24MHz or
48MHz, it is selectable through register. Default is 24MHz input.
PME#
98
OD
12p3
Generated PME event.
PCICLK
19
IN
tsp3
PCI clock input.
LDRQ#
20
O
12p3
Encoded DMA Request signal.
SERIRQ
21
I/O
12tp3
Serial IRQ input/Output.
LAD[3:0]
23-26
I/O
12tp3
These signal lines communicate address, control, and data
information over the LPC bus between a host and a peripheral.
LFRAME#
27
IN
tsp3
Indicates start of a new cycle or termination of a broken cycle.
LRESET#
28
IN
tsp3
Reset signal. It can connect to PCIRST# signal on the host.
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