參數(shù)資料
型號(hào): uPSD3212CV
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(帶8032微控制器內(nèi)核和16Kbit SRAM的FLASH可編程系統(tǒng)器件)
中文描述: 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核和16Kbit的SRAM(帶8032微控制器內(nèi)核和16Kbit SRAM的的閃存可編程系統(tǒng)器件)
文件頁數(shù): 54/151頁
文件大?。?/td> 1194K
代理商: UPSD3212CV
uPSD3212C, uPSD3212CV
54/151
Table 41. Timer/Counter 2 Operating Modes
Note:
= falling edge
Table 42. Description of the T2CON Bits
Note: 1. The RCLK1 and TCLK1 Bits in the PCON Register control UART 2, and have the same function as RCLK and TCLK.
Mode
T2CON
T2MOD
DECN
T2CON
EXEN
P1.1
T2EX
Remarks
Input Clock
RxCLK
or
TxCLK
CP/
RL2
TR2
Internal
External
(P1.0/T2)
16-bit
Auto-
reload
0
0
1
0
0
x
reload upon overflow
f
OSC
/12
MAX
f
OSC
/24
0
0
1
0
1
reload trigger (falling
edge)
0
0
1
1
x
0
Down counting
0
0
1
1
x
1
Up counting
16-bit
Capture
0
1
1
x
0
x
16-bit Timer/Counter
(only up counting)
f
OSC
/12
MAX
f
OSC
/24
0
1
1
x
1
Capture (TH1,TL2)
(RCAP2H,RCAP2L)
Baud Rate
Generator
1
x
1
x
0
x
No Overflow Interrupt
Request (TF2)
f
OSC
/12
MAX
f
OSC
/24
1
x
1
x
1
Extra External Interrupt
(Timer 2)
Off
x
x
0
x
x
x
Timer 2 stops
Bit
Symbol
Function
7
TF2
Timer 2 Overflow Flag. Set by a Timer 2 overflow, and must be cleared by software. TF2
will not be set when either (RCLK, RCLK1)=1 or (TCLK, TCLK)=1
6
EXF2
Timer 2 External Flag set when either a capture or reload is caused by a negative
transition on T2EX and EXEN2=1. When Timer 2 Interrupt is enabled, EXF2=1 will
cause the CPU to vector to the Timer 2 Interrupt routine. EXF2 must be cleared by
software
5
RCLK
(1)
Receive Clock Flag (UART 1). When set, causes the serial port to use Timer 2 overflow
pulses for its receive clock in Modes 1 and 3. TCLK=0 causes Timer 1 overflow to be
used for the receive clock
4
TCLK
(1)
Transmit Clock Flag (UART 1). When set, causes the serial port to use Timer 2 overflow
pulses for its transmit clock in Modes 1 and 3. TCLK=0 causes Timer 1 overflow to be
used for the transmit clock
3
EXEN2
Timer 2 External Enable Flag. When set, allows a capture or reload to occur as a result
of a negative transition on T2EX if Timer 2 is not being used to clock the serial port.
EXEN2=0 causes Time 2 to ignore events at T2EX
2
TR2
Start/stop control for Timer 2. A logic 1 starts the timer
1
C/T2
Timer or Counter Select for Timer 2. Cleared for timer operation (input from internal
system clock, t
CPU
); set for external event counter operation (negative edge triggered)
0
CP/RL2
Capture/Reload Flag. When set, capture will occur on negative transition of T2EX if
EXEN2=1. When cleared, auto-reload will occur either with TImer 2 overflows, or
negative transitions of T2EX when EXEN2=1. When either (RCLK, RCLK1)=1 or (TCLK,
TCLK)=1, this bit is ignored, and timer is forced to auto-reload on Timer 2 overflow
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPSD3212CV-24T1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM
UPSD3212CV-24T6 功能描述:8位微控制器 -MCU 3.0V 512K 24MHz RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3212CV-24T6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
UPSD3212CV-24U1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM
UPSD3212CV-24U6 功能描述:8位微控制器 -MCU 3.0V 512K 24MHz RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT