參數(shù)資料
型號: UDA1335H
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: Universal Serial Bus USB Audio Playback Recording Peripheral APRP
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: 14 X 20 MM, 2.80 MM HEIGHT, PLASTIC, SOT-319-2, QFP-64
文件頁數(shù): 6/44頁
文件大小: 254K
代理商: UDA1335H
1998 Aug 28
6
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) Audio
Playback Recording Peripheral (APRP)
UDA1335H
PINNING
SYMBOL
PIN
QFP64
I/O
DESCRIPTION
GP3/WSO
GP4/BCKO
P0.5
SHTCB
P0.6
D
P0.7
D+
V
DDI
V
SSI
V
SSE
V
DDE
GP1/DI
P2.0
GP5/WSI
P2.1
GP0/BCKI
P2.2
SCL
P2.3
SDA
P2.4
P2.5
V
SSX
XTAL1b
XTAL2b
CLK
V
DDX
P2.6
P2.7
PSEN
V
DDO
V
SSO
VOUTL
TC
RTCB
VOUTR
V
DDA1
V
SSA1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
I/O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
O
O
I/O
I/O
I/O
O
I
I
O
general purpose pin 3 or word select output
general purpose pin 4 or bit clock output
port 0.5 of the microcontroller
shift clock of the test control block (active HIGH)
port 0.6 of the microcontroller
negative data line of the differential data bus, conforms to the USB standard
port 0.7 of the microcontroller
positive data line of the differential data bus, conforms to the USB standard
digital supply voltage for core
digital ground for core
digital ground for I/O pads
digital supply voltage for I/O pads
general purpose pin 1 or data input
port 2.0 of the microcontroller
general purpose pin 5 or word select input
port 2.1 of the microcontroller
general purpose pin 0 or bit clock input
port 2.2 of the microcontroller
serial clock line I
2
C-bus
port 2.3 of the microcontroller
serial data line I
2
C-bus
port 2.4 of the microcontroller
port 2.5 of the microcontroller
crystal oscillator ground (48 MHz)
crystal input (analog; 48 MHz)
crystal output (analog; 48 MHz)
48 MHz clock output signal
supply crystal oscillator (48 MHz)
port 2.6 of the microcontroller
port 2.7 of the microcontroller
program store enable (active LOW)
supply voltage for operational amplifier
operational amplifier ground
voltage output left channel
test control input (active HIGH)
asynchronous reset input of the test control block (active HIGH)
voltage output right channel
analog supply voltage 1
analog ground 1
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