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參數(shù)資料
| 型號(hào)： | TW9903 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TW9903 ? Multi-standard Video Decoder With High Quality Down Scaler |
| 中文描述： | TW9903？多標(biāo)準(zhǔn)視頻解碼器，高品質(zhì)下倍線器 |
| 文件頁(yè)數(shù)： | 26/74頁(yè) |
| 文件大?。?/td> | 630K |
| 代理商： | TW9903 |
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TW9903
TECHWELL, INC.
26
REV. 0.92 ( B )
06/02/2002
Line 21 Closed Captioning and line 284 Extended Data Service of 525-line video system is at a
0.5035MHz bit rate. Line 22, line 335 Closed Captioning of 625-line video system is at about
0.500MHz.It contains 14bits Clock Run-in by double bit rate, 3bits Start Bits, and 2 bytes data.
Each of these 2 bytes is a 7 bit + odd parity ASCII character which represents text or control
characters for positioning or display control. For the purposes of CC or EDS, only the Y component
of the video signal is used. The TW9903 can be programmed to decode CC or EDS data by
setting register 0x1A. Since the CC and EDS are independent, there could be one or both in a
particular frame. A typical waveform is shown in Figure 14.
CC/EDS decoder uses the internal low pass filtered VBI data with ADC sampling rate. CC/EDS Bit
rate frequency is generated internally.
In the CC/EDS decode mode, the decoder monitors the appropriate scan lines looking for the clock
run-in and start bits pattern. If it s found, it starts tracking Clock Run-in Frequency and checks the
status of Clock Run-in and start bits. Some programming may use these scan lines for other
purpose. The caption data is sampled and loaded into shift registers, and the data is then
transferred to the caption data FIFO. The TW9903 provides a 16 x 10 location FIFO for storing
CC/EDS data. Once the video decoder detects the correct status of Clock Run-in, Start Bits in the
CC/EDS signal, it captures the low byte of CC/EDS data at first and high byte next. Data is stored
in the FIFO low byte first and high byte next sequentially. Captioned data is available to the user
through the CC_DATA register (0x1B). Upon being placed in the 10-bit FIFO, two additional bits
are attached to the CC/EDS data byte by TW9903’ s CC/EDS decoder. These two bits indicate
whether the given byte stored in the FIFO corresponds to CC or EDS data and whether it is the
high or low byte of CC/EDS. These two bits are available to the user through the CC_STATUS
register bits CC_EDS and LO_HI(0x1A[1:0]), respectively. As stored in the FIFO, LO_HI is bit 8
and CC_EDS is bit 9. Additionally, the TW9903 reports the results of the parity check in the
PARITY bit in the CC_STATUS register. FIFO can hold 17 data Initially when the FIFO is empty,
bit FF_EMP in the CC_STATUS register (0x1A[2]) is set low indicating that no data is available in
the FIFO. Subsequently, when data has been stored in the FIFO, the FF_EMP bit is set to logical
high. Once the FIFO has more than 8 bytes, the CC_VALID pin outputs low if CCVALID_EN bit in
CC_STATUS register (0x1A[7]) is high and CCVALID bit in CSTATUS register(0x01[2]) also
becomes high. If CC_VALID pin is used, CCVALID pin must have external pull-up resister of
4.75 …0kohm typically. While FIFO has less than 7data, if CCVALID_EN bit is disabled
(0x1A[7]=0), CCVALID pin always outputs high by external pull-up resister. If there is no pull-up
resister, CVALID pin outputs tri-state unstable signal. CCVALID pin is used when hardware
handshaking with Micro controller is needed. In many applications, only CCVALID bit in CSTATUS
register(0x01[2]) is used normally. If the FIFO read cycle time is long, then FIFO overflow condition
may happen. After 17 data are stored in FIFO, FF_OVF bit in CC_STATUS register(0x1A[3])
becomes high. After FF_OVF becomes high, any incoming data causes only 17th location data to
be overwritten. After FIFO is read and FIFO has less than 16 data, FF_OVF bit becomes low.
However, once FF_OVF bit becomes high some data loss may happen. In this case, FIFO must
be reset by the following way (a) or (b). Method (b) is most often used.
(a) Execute Software Reset (Write 0x06[7]=1)
(b) Write CC_STATUS register bits 0x1A[6:5]=00
16 times read CC_DATA register 0x1B continuously
Write CC_STATUS Register bits 0x1A[6:5] for the application again
There will routinely be asynchronous reads and writes to the CC/EDS FIFO. The writes will be from
the CC/EDS circuitry and the reads will occur as the system controller reads the CC/EDS data from
TW9903. These reads and writes will not occur until FIFO is in overflow condition. The average
FIFO Read cycle time must be shorter than Cosed Captioning byte transmitter cycle time. If either
odd field Close Captioning or even field Closed Captioning is enabled, the average FIFO read
cycle time must be shorter than 2 times write per 1 frame cycle. If both odd field Closed Captioning
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| TW9903-FB | 功能描述:IC DECODER VIDEO NTSC/PAL/SECAM RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| TW9903-MB | 功能描述:IC DECODER VIDEO NTSC/PAL/SECAM RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| TW9903-MBS | 功能描述:IC NTSC/PAL/SECAM DECODR 100PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| TW9905-FD | 功能描述:IC DECODER VIDEO NTSC/PAL/SECAM RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| TW9905-MD | 功能描述:IC DECODER VIDEO NTSC/PAL/SECAM RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
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