參數(shù)資料
型號: TW9903
廠商: Electronic Theatre Controls, Inc.
英文描述: TW9903 ? Multi-standard Video Decoder With High Quality Down Scaler
中文描述: TW9903?多標準視頻解碼器,高品質下倍線器
文件頁數(shù): 21/74頁
文件大?。?/td> 630K
代理商: TW9903
TW9903
TECHWELL, INC.
21
REV. 0.92 ( B )
06/02/2002
Figure 13b.Optional 16-bit output with ITU-R BT.656 control code
Table 3. ITU-R BT.656 SAV and EAV code sequence
VD1
4
VD13
VD12
1
1
1
0
0
0
0
0
0
F
V
H
H = 0 - SAV, 1 – EAV V = 1 - blanking, 0 – elsewhere
VD1
5
1
0
0
*C
VD11
1
0
0
V XOR H
VD10
1
0
0
F XOR H
VD9
1
0
0
F XOR V
VD8
1
0
0
First byte
Second byte
Third byte
Forth byte
F XOR V XOR H
F = 0 - field 1, 1 - field 2
*C is set by VIPCFG register bit.
Down-scaling and Cropping
The TW9903 provides two methods to reduce the amount of output video pixel data, downscaling
and cropping. The downscaling provides full video image at lower resolution. Cropping provides
only a portion of the video image output. All these mechanisms can be controlled independently to
yield maximum flexibility in the output stream.
TW9903 Down -Scaling
The TW9903 can independently reduce the output video image size in both horizontal and vertical
directions using arbitrary scaling ratios up to 1/16 in each direction. The horizontal scaling employs
a dynamic 6-tap 32-phase interpolation filter for luma and a 2tap 8-phase interpolation filter for
chroma because of the limited bandwidth of the chroma data. The vertical scaling uses 2-tap to 5-
tap 8-phase interpolation filter dynamically for luma depending on the horizontal and vertical
scaling ratio. Besides its normal scaling function, the scaling logic can be doubled as additional line
comb filter to either reduce crawling dot or cross color at the expense or resolution.
Downscaling is achieved by programming the horizontal scaling ratio register (HSCALE) and
vertical scaling ratio register (VSCALE). When outputting unscaled video, the TW9903 will output
CCIR601 compatible 720 pixels per line or any number of pixels per line as specified by the
HACTIVE register. The standard output for Square Pixel mode is 640 pixels for 60 Hz system and
768 pixels for 50 Hz systems. If the number of output pixels required is smaller than 720 in
CCIR601 compatible mode or the number specified by the HACTIVE register. The 12-bit HSCALE
register, which is the concatenation of two 8-bit registers SCALE_HI and HSCALE_LO, is used to
reduce the output pixels to the desired number.
S A V
E A V
C L K X 1
DVALID
HACTIVE
VD[15:8]
VD[7:0]
FF
00
00
X Y
80
10
FF
00
00
X Y
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