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參數(shù)資料
| 型號： | TTSI1K16T |
| 英文描述： | 1024-Channel, 16-Highway Time-Slot Interchanger |
| 中文描述： | 1024通道，16道時隙交換器 |
| 文件頁數(shù)： | 51/64頁 |
| 文件大?。?/td> | 1110K |
| 代理商： | TTSI1K16T |
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Preliminary Data Sheet
February 1999
TTSI1K16T
1024-Channel, 16-Highway Time-Slot Interchanger
51
Lucent Technologies Inc.
Connection Store Memory
(continued)
Table 44. Connection Store Memory (Byte 0)
Table 45. Connection Store Memory (Byte 1)
To illustrate the connection store programming scheme, consider the following example:
To configure the transmission of time slot 7 on TXD6, the following addresses are used to access the relevant TSI
connection store memory locations.
A[14—0] = 10_00110_0000111_0 = 0x460E—to access byte 0
A[14—0] = 10_00110_0000111_1 = 0x460F—to access byte 1
Now, if it is desired to send Rx time slot 4 from RXD3 to time slot 7 on TXD6 in frame integrity mode, then the fol-
lowing data should be written to the above addresses.
Data byte 0 = 0_0000100 = 0x04
Data byte 1 = 001_00011 = 0x23
Thus, to map Rx time slot 4 from RXD3 to Tx time slot 7 on TXD6, in frame integrity mode, the following two TSI
writes must be performed.
Write location 0x460E with 0x04
Write location 0x460F with 0x23
Bit
7—0
Symbol
RTSA[6—0]/
HSD[7—0]
Name/Description
Receive Time-Slot Address[6
—
0]/Host Substituted Data[7
—
0].
If low-
latency or frame-integrity time-slot data select modes are selected for the partic-
ular transmit time slot being configured, then these bits are used to indicate the
receive time-slot address from which the transmit time-slot data is sourced. Bit 7
should be set to 0.
If the host data substitution mode is selected for the particular transmit time slot
being configured, then these 8 bits will represent the data byte to be transmitted.
These bits are not valid for time-slot data select modes 3—7.
Bit
7—5
Symbol
TSDSM[2—0]
Time-Slot Data Select Mode[2
—
0]
0
0
0
0
1
1
1
Name/Description
0
0
1
1
0
0
1
0
1
0
1
0
1
0
Low-latency mode.
Frame-integrity mode.
Host data substitution mode.
Idle code 1 substitution mode.
Idle code 2 substitution mode.
Idle code 3 substitution mode.
Test-pattern substitution mode—test pattern is
selected via test-pattern style register.
High-impedance mode.
1
1
1
4
—
Reserved.
Must be written to 0.
Receive Highway Number.
Used to select the receive highway from which the
outgoing time-slot data is sourced. These bits are only valid for time-slot data
select modes 0 and 1.
3—0
RXHWY
[3—0]
相關PDF資料 |
PDF描述 |
|---|---|
| TTSI1K16T3TL | 1024-Channel, 16-Highway Time-Slot Interchanger |
| TTSI1K16T | 1024-Channel, 16-Highway Time-Slot Interchanger(1024通道、16路干線時隙交換機) |
| TTSI2K32T | 2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T3BAL | 2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T | 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時隙交換機) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TTSI1K16T3TL | 制造商:AGERE 制造商全稱:AGERE 功能描述:1024-Channel, 16-Highway Time-Slot Interchanger |
| TTSI1K16T3TL-DB | 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述: |
| TTSI2K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
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