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參數(shù)資料
| 型號： | TS8388BMFSB/QNB2 |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 12/42頁 |
| 文件大?。?/td> | 1307K |
| 代理商： | TS8388BMFSB/QNB2 |
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TS8388BFS
Product Specification
TABLE OF CONTENTS
1.
SIMPLIFIED BLOCK DIAGRAM....................................................................................................................................3
2.
FUNCTIONAL DESCRIPTION ........................................................................................................................................3
3.
SPECIFICATIONS..............................................................................................................................................................4
3.1.
ABSOLUTE MAXIMUM RATINGS (SEE NOTES BELOW).................................................................................................................... 4
3.2.
RECOMMENDED CONDITIONS OF USE ............................................................................................................................................. 4
3.3.
ELECTRICAL OPERATING CHARACTERISTICS................................................................................................................................. 5
3.4.
TIMING DIAGRAMS................................................................................................................................................................................ 9
3.5.
EXPLANATION OF TEST LEVELS ...................................................................................................................................................... 10
3.6.
FUNCTIONS DESCRIPTION................................................................................................................................................................ 10
3.7.
DIGITAL OUTPUT CODING ................................................................................................................................................................. 10
4.
PACKAGE DESCRIPTION. ............................................................................................................................................11
4.1.
TS8388BFS PIN DESCRIPTION .......................................................................................................................................................... 11
4.2.
TS8388BFS PINOUT ............................................................................................................................................................................ 12
4.3.
OUTLINE DIMENSIONS – 68 PINS CQFP .......................................................................................................................................... 13
4.4.
THERMAL CHARACTERISTICS .......................................................................................................................................................... 14
5.
TYPICAL CHARACTERIZATION RESULTS .............................................................................................................15
5.1.
STATIC LINEARITY – FS = 50 MSPS / FIN = 10 MHZ......................................................................................................................... 15
5.2.
EFFECTIVE NUMBER OF BITS VERSUS POWER SUPPLIES VARIATION ..................................................................................... 16
5.3.
TYPICAL FFT RESULTS ...................................................................................................................................................................... 17
5.4.
SPURIOUS FREE DYNAMIC RANGE VERSUS INPUT AMPLITUDE ................................................................................................ 18
5.5.
DYNAMIC PERFORMANCE VERSUS ANALOG INPUT FREQUENCY ............................................................................................. 20
5.6.
EFFECTIVE NUMBER OF BITS (ENOB) VERSUS SAMPLING FREQUENCY .................................................................................. 21
5.7.
SFDR VERSUS SAMPLING FREQUENCY ......................................................................................................................................... 21
5.8.
TS8388BFS ADC PERFORMANCES VERSUS JUNCTION TEMPERATURE ................................................................................... 22
5.9.
TYPICAL FULL POWER INPUT BANDWIDTH .................................................................................................................................... 23
5.10.
ADC STEP RESPONSE................................................................................................................................................................... 24
6.
DEFINITION OF TERMS ................................................................................................................................................25
7.
TS8388BFS MAIN FEATURES .......................................................................................................................................27
7.1.
TIMING INFORMATIONS ..................................................................................................................................................................... 27
7.2.
PRINCIPLE OF DATA READY SIGNAL CONTROL BY DRRB INPUT COMMAND............................................................................ 28
7.3.
ANALOG INPUTS (VIN) (VINB)............................................................................................................................................................ 28
7.4.
CLOCK INPUTS (CLK) (CLKB) ............................................................................................................................................................ 29
7.5.
NOISE IMMUNITY INFORMATIONS.................................................................................................................................................... 32
7.6.
DIGITAL OUTPUTS .............................................................................................................................................................................. 32
7.7.
OUT OF RANGE BIT
................................................................................................................................................................................... 34
7.8.
GRAY OR BINARY OUTPUT DATA FORMAT SELECT...................................................................................................................... 35
7.9.
DIODE PIN 49 ....................................................................................................................................................................................... 35
7.10.
ADC GAIN CONTROL PIN 60.......................................................................................................................................................... 36
8.
EQUIVALENT INPUT / OUTPUT SCHEMATICS ......................................................................................................37
8.1.
EQUIVALENT ANALOG INPUT CIRCUIT AND ESD PROTECTIONS ................................................................................................ 37
8.2.
EQUIVALENT ANALOG CLOCK INPUT CIRCUIT AND ESD PROTECTIONS................................................................................... 37
8.3.
EQUIVALENT DATA OUTPUT BUFFER CIRCUIT AND ESD PROTECTIONS .................................................................................. 38
ADC GAIN ADJUST EQUIVALENT INPUT CIRCUITS AND ESD PROTECTIONS.......................................................................................... 38
8.5.
GORB EQUIVALENT INPUT SCHEMATIC AND ESD PROTECTIONS.............................................................................................. 39
8.6.
DRRB EQUIVALENT INPUT SCHEMATIC AND ESD PROTECTIONS .............................................................................................. 39
9.
TSEV8388BFS : DEVICE EVALUATION BOARD ......................................................................................................40
10.
ORDERING INFORMATION .....................................................................................................................................41
10.1.
PACKAGE DEVICE .......................................................................................................................................................................... 41
10.2.
EVALUATION BOARD ..................................................................................................................................................................... 41
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