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參數(shù)資料
| 型號： | TPS2330EVM-185 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | TPS2330/TPS2331,TPS5102 InfiniBand SM Bulk Power Evalutation Module and Interface Card( InfiniBand SM 降壓電源管理器件TPS2330/TPS2331, TPS5102的評估板與接口卡) |
| 中文描述： | TPS2330/TPS2331，TPS5102釤InfiniBand的電力大Evalutation模塊和接口卡（InfiniBand的釤降壓電源管理器件TPS2330/TPS2331，TPS5102的評估板與接口卡） |
| 文件頁數(shù)： | 15/26頁 |
| 文件大?。?/td> | 1375K |
| 代理商： | TPS2330EVM-185 |
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3-5
Schematics of the EVM and the Interface Card
The schematic for InfiniBand bulk power EVM (Figure 3–2) shows three
jumpers (JP1, JP2, and JP3). JP1 is used to set the dc/dc converter stage in
PWM (normal) or skip (power-saving) mode. For normal operation, short JP1,
then the converter will be in PWM mode. JP2 is used to shut down the dc/dc
converter when it is shorted, so this jumper should not be shorted if the dc/dc
conversion is required. JP3 should be shorted for InfiniBand bulk power
evaluation because the InfiniBand specification recommends the power-good
signal of the hot-swap stage to enable the dc/dc converter.
A 14-V Zener diode in parallel with C25 is recommended if the backplane pow-
er is noisy or has potential high voltage spikes, higher than 14 V.
Several components along with the jumpers and test points are only for
evaluation purposes and are not necessary for the hot-swap and/or dc/dc
applications. Refer to the data sheets to optimize your designs.
A key is installed in the edge connector on the interface board (SLSP155) to
ensure that the board can only be inserted in the correct direction.
The bills of materials (BOM) for both boards are shown in Tables 3–1 and 3–2,
respectively.
Table 3–1.Components on the Interface Card (SLVP155), Bill of Materials
Ref Des
Qty
Part Number
Description
MFG
Size
C1, C3
Not used
C2
1
LSR100/16DK125
Capacitor, tantalum, 100-
μ
F, 16 V, 10%
NEMCO
D Case
C4, C6
Not used
C5
1
GMK325F106ZH
Capacitor, ceramic, 10-
μ
F, 35-V
Taiyo
Yuden
1210
C7, C9
Not used
C8
1
GRM40X7R105K16
Capacitor, ceramic, 1-
μ
F, 16 V
Connector, banana jack, uninsulated
MuRata
0805
J3, J4
2
3267
Pomona
J1,J2,J5,
J6
Not used
P1
1
50–22SN–11
Connector, 44-pin edge w/mtg tabs (for 0.062” PCB)
Resistor, chip, 10 k
, 1/10 W, 5%
SW–1C–200 MA-SL
Cinch
R1, R2
2
Std
Std
1206
S1
1
EG1218
TP1
1
240–345
Test point, red, 1 mm
Farnell
TP5
1
240–333
Test point, black, 1 mm
Farnell
TP2–TP3
Not used
TP4,TP6
Not used
Key
1
50–PK–3
Key for P1 (Newark #57F3275)
Cinch
4
534–1804
Spacer, aluminum, 4–40 female, 0.625” long
Screw, pan head phillips, 4–40
×
0.25”
Mouser
4
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