參數(shù)資料
型號(hào)： TDA8920TH/N1,118
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 音頻／視頻放大
英文描述： 80 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO24
封裝： PLASTIC, SOT-566-3, HSOP-24
文件頁(yè)數(shù)： 8/36頁(yè)
文件大小： 733K
代理商： TDA8920TH/N1,118
2002 Sep 25
16
Philips Semiconductors
Product specication
2
× 80 W class-D power amplier
TDA8920
16 APPLICATION INFORMATION
16.1
BTL application
When using the system in the mono BTL application (for
more output power), the inputs of both channels must be
connected in parallel; the phase of one of the inputs must
be inverted; see Fig.5. In principle the loudspeaker can be
connected between the outputs of the two single-ended
demodulation filters.
16.2
MODE pin
For correct operation the switching voltage at the mode pin
should be debounced. If the mode pin is driven by a
mechanical switch an appropriate debouncing low-pass
filter should be used. If the mode pin is driven by an
electronic circuit or microcontroller then it should remain at
the mute voltage level for at least 100 ms before switching
back to the standby voltage level.
16.3
Output power estimation
The output power in several applications (SE and BTL)
can be estimated using the following expressions:
SE:
Maximum current:
should not exceed 7.5 A.
BTL:
Maximum current:
should not exceed 7.5 A.
Legend:
RL = load impedance
fosc = oscillator frequency
tmin = minimum pulse width (typical 190 ns)
VP = single-sided supply voltage (so if supply ±30 V
symmetrical
→ VP =30V)
Pout_1% = output power just at clipping
Pout_10% = output power at THD = 10%
Pout_10% = 1.25 × Pout_1%.
16.4
External clock
The minimum required symmetrical supply voltage for
external clock application is
±15 V (equally the minimum
asymmetrical supply for applications with an external clock
is 30 V).
When using an external clock the following accuracy of the
duty cycle of the external clock has to be taken into
account; 47.5% < DC, external clock < 52.5%.
A possible solution for an external clock oscillator circuit is
illustrated in Fig.7.
P
out_1%
R
L
R
L
0.6
+
---------------------
V
P
1t
min
f
osc
×
–
()
×
2
2R
L
×
------------------------------------------------------------------------------------------
=
I
out^
V
P
1t
min
f
osc
×
–
()
×
R
L
0.6
+
-----------------------------------------------------
=
P
out_1%
R
L
R
L
1.2
+
---------------------
2V
P
1t
min
f
osc
×
–
()
×
2
2R
L
×
---------------------------------------------------------------------------------------------
=
I
out^
2V
P
1t
min
f
osc
×
–
()
×
R
L
1.2
+
---------------------------------------------------------
=
handbook, full pagewidth
1
14
7
2
11
13
10
4
5
6
89
12
3
CTC
0
0
+
ASTAB
ASTAB
+
TRIGGER
+TRIGGER
RETRIGGER
MR
220
nF
5.6 V
4.3 V
HOP
GND
MBL468
HEF4047BT
VDD
360 kHz
320 kHz
VDDA
VSS
9.1 k
2 k
120 pF
RTC
CLOCK
RCTC
Fig.7 External oscillator circuit.
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