參數(shù)資料
型號: APL5523K
廠商: Anpec Electronics Corporation
英文描述: Dual-Channel, 3.3V/500mA and 1.8V/300mA Linear Regulator
中文描述: 雙通道,3.3V/500mA和1.8V/300mA線性穩(wěn)壓器
文件頁數(shù): 1/11頁
文件大小: 143K
代理商: APL5523K
Dual-Channel, 3.3V/500mA and 1.8V/300mA Linear Regulator
Copyright
ANPEC Electronics Corp.
Rev. A.1 - July., 2004
APL5523
www.anpec.com.tw
1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Features
General Description
The APL5523 is a dual low dropout regulator with
output1 with 3.3V/0.5A and output2 with 1.8V/0.3A
output capability. In order to obtain lower dropout
voltage and faster transient response, which is criti-
cal for low voltage applications, the APL5223 has
been optimized. The dropout voltages are guaran-
teed at 0.6V at 0.5A for output1 and 0.9V at 0.3A for
output 2. Current limit is trimmed to ensure speci-
fied output current and controlled short-circuit current.
On-chip thermal limiting provides protection against
any combination of overload that would create ex-
cessive junction temperatures. The APL5523 regu-
lator comes in a SOP-8 and SOP-8-P package.
Applications
Desktop Computer
Networking Systems
Optical Data Storage Systems
Fixed Output Voltage :
VOUT1=3.3V/500mA
VOUT2=1.8V/300mA
Low Dropout Voltage (defined as the minimum
input/output voltage difference):
Output 1 Dropout Voltage : 0.6V (at 500mA)
Output 2 Dropout Voltage : 0.9V (at 300mA)
Stable with 4.7uF Output Capacitor(at VOUT1)
Stable with 2.2uF Output Capacitor(at VOUT2)
Built in Thermal Protection
Built in Current Limit Protection
Fast transient Response
Short Setting Time
SOP-8 and SOP-8-P Package Available
Pin Configuration
SOP
8 (Top View)
Ordering and Marking Information
A P L 5523
H andling C ode
T e m p . R a nge
P a ck age C ode
K : S O P -8
K A : S O P -8 -P
O p eratin g Jun c tion T e m p . R a n g e
C : 0 to 1 5 0 ° C
H andling C ode
T U : T u b e
T R : Tape & R eel
Lea d F ree C ode
L : Lead F ree D e v ice
B lank : O rig inal D e v ic e
A P L5523 K /K A :
A P L5523
XXXXX
XXXXX - D a te C o d e
Lea d F ree C ode
SOP-8-P (Top View)
(connected to GND plane for better heat
dissipation)
= Thermal Pad
GN D
1
2
3
8
6
4
7
5
V IN
NC
V IN
V OU T 2
V OU T 1
GN D
1
2
3
8
6
4
7
5
V IN
GN D
V IN
V OU T 2
V OU T 1
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