參數(shù)資料
型號: TC1017-2.6VCTTR
元件分類: 固定正電壓單路輸出LDO穩(wěn)壓器
英文描述: 2.6 V FIXED POSITIVE LDO REGULATOR, 0.5 V DROPOUT, PDSO5
封裝: PLASTIC, MO-178, SOT-23, 5 PIN
文件頁數(shù): 3/22頁
文件大小: 357K
代理商: TC1017-2.6VCTTR
2005 Microchip Technology Inc.
DS21813D-page 11
TC1017
4.1
Input Capacitor
Low input source impedance is necessary for the LDO
to operate properly. When operating from batteries, or
in applications with long lead length (> 10") between
the input source and the LDO, some input capacitance
is required. A minimum of 0.1 F is recommended for
most applications and the capacitor should be placed
as close to the input of the LDO as is practical. Larger
input capacitors will help reduce the input impedance
and further reduce any high-frequency noise on the
input and output of the LDO.
4.2
Output Capacitor
A minimum output capacitance of 1 F for the TC1017
is required for stability. The Equivalent Series Resis-
tance (ESR) requirements on the output capacitor are
between 0 and 2 ohms. The output capacitor should be
located as close to the LDO output as is practical.
Ceramic materials X7R and X5R have low temperature
coefficients and are well within the acceptable ESR
range required. A typical 1 F X5R 0805 capacitor has
an ESR of 50 milli-ohms. Larger output capacitors can
be used with the TC1017 to improve dynamic behavior
and input ripple-rejection performance.
Ceramic, aluminum electrolytic or tantalum capacitor
types can be used. Since many aluminum electrolytic
capacitors freeze at approximately –30
°C, ceramic or
solid tantalums are recommended for applications
operating below –25
°C. When operating from sources
other than batteries,
supply-noise rejection and
transient response can be improved by increasing the
value of the input and output capacitors and employing
passive filtering techniques.
4.3
Turn-On Response
The turn-on response is defined as two separate
response categories, wake-up time (tWK) and settling
time (tS).
The TC1017 has a fast wake-up time (10 sec, typical)
when released from shutdown. See Figure 4-3 for the
wake-up time designated as tWK. The wake-up time is
defined as the time it takes for the output to rise to 2%
of the VOUT value after being released from shutdown.
The total turn-on response is defined as the settling
time (t
S) (see Figure 4-3). Settling time (inclusive with
tWK) is defined as the condition when the output is
within 98% of its fully-enabled value (32 sec, typical)
when released from shutdown. The settling time of the
output voltage is dependent on load conditions and
output capacitance on VOUT (RC response).
The table below demonstrates the typical turn-on
response timing for different input voltage power-up
frequencies: VOUT = 2.85V, VIN = 5.0V, IOUT = 60 mA
and COUT = 1 F.
FIGURE 4-3:
Wake-Up Time from Shutdown.
Frequency
Typical (tWK)
Typical (tS)
1000 Hz
5.3 sec
14 sec
500 Hz
5.9 sec
16 sec
100 Hz
9.8 sec
32 sec
50 Hz
14.5 sec
52 sec
10 Hz
17.2 sec
77 sec
VIH
tS
tWK
VOUT
98%
2%
VIL
SHDN
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