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| 型號： | SUPER1284-04QT |
| 廠商： | California Micro Devices Corporation |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 連接器附件 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 398K |
| 代理商： | SUPER1284-04QT |
CALIFORNIA MICRO DEVICES
1998 California Micro De is a registered trademark and PAC is a trademark of California Micro Devices.
P/Active
7/98 Rev. 1
1
21215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
SUPER 1284
P/ACTIVE IEEE 1284 ECP/EPP TERMINATION NETWORK
Features
Single chip IEEE 1284 parallel port termination
28 pin QSOP package, smallest physical solution
17 terminating lines in a single package
In system ESD protection to 8KV, HBM
In system ESD protection to 4KV per IEC1000-4-2
Protects downstream devices to 30V
SCHEMATIC CONFIGURATION
Applications
ECP/EPP Parallel Port termination
PC Peripherals
Notebook and Desktop computers
Engineering Workstations and Servers
C0150897D
7/98 Rev. 1
Product Description
California Micro Devices Super 1284 Parallel Port Termination Network provides a complete integrated solution for the entire
IEEE 1284 interface in a single QSOP package.
Advanced, enhanced high-speed parallel ports, conforming to the IEEE 1284 standard, are used to provide communications
with external devices such as tape back-up drives, ZIP drives, printers, parallel port SCSI adapters, external LAN adapters, scanners,
video capture, and other PC peripherals. These advanced ports support bi-directional transfers to 2MB/sec. To effectively support
these higher transfer data rates, the IEEE 1284 standard recommends a combined termination, pull-up filter network between
the driver/receiver and the cable at both ends of the parallel port interface. In addition, government EMC compatibility
requirements impose strict filtering on the parallel port. California Micro Devices Super 1284
Parallel Port Termination Network
addresses all of these requirements by providing a seventeen line, IEEE 1284 compliant network in a thin film integrated circuit.
The device provides a complete parallel port termination solution for space critical applications by integrating a total of 43
discrete components. In addition, all I/O pins are ESD protected for contact discharges up to 4KV per the Human Body Model.
However, the output pins of the device which have the highest probability of exposure to ESD pulses are protected to 8KV, HBM,
thereby providing the necessary robustness for the ports application environment.
California Micro Devices P/Active technology provides high reliability and low cost through manufacturing efficiency. The resistors
and capacitors are fabricated using proprietary state-of-the-art thin film technology. California Micro Devices solution is silicon-
based and has the same reliability characteristics as todays integrated circuits.
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1998 California Micro Devices Corp. All rights reserved.
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