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| 型號(hào)： | STR911FW42X6T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | ARM966E-S TM 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA |
| 中文描述： | ARM966E - ?商標(biāo)16/32位閃存微控制器與以太網(wǎng)，USB，加拿大，交流電機(jī)控制，4個(gè)定時(shí)器，模數(shù)轉(zhuǎn)換器，RTC和DMA的 |
| 文件頁數(shù)： | 58/73頁 |
| 文件大小： | 595K |
| 代理商： | STR911FW42X6T |
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Electrical characteristics
STR91xF
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Table 22.
EMI write operation
Notes:1 ALE_LENGTH = 1 by default (can be programmed to be 2 by setting the bits In the SCU_SCR0
register)
2 WSTWR =1Fh by default (WR wait state time = WSTWR x t
BCLK
, WSTWR can be programmed
in the EMI_WCRx Register)
3 WSTWEN= 0 by default (WR assertion delay from chip select. WSTWEN can be programmed
in the EMI_WECRx Register)
4 When the CPU executes a 16-bit write to a x8 EMI bus, the second write cycle's address setup
time is defined as t
WAS
=(WSTWEN - ) x t
BCLK
Symbol
Parameter
Test
Conditions
Value
Unit
Min
Max
t
WCR
WRn to CSn inactive
(t
BCLK
/2) - 1
(t
BCLK
/2) +1
ns
t
WP
Write Pulse Width
(WSTWR-WSTWEN + 1) x
t
BCLK
- 1
(WSTWR-WSTWEN + 1) x
t
BCLK
+ 1
ns
t
WDS
Write Data Setup
Time
(non-mux mode)
(WSTWEN + 1/2) x t
BCLK
ns
Write Data Setup
Time
(mux mode )
ALE
length=1
WSTWEN>2
(WSTWEN - 1.5) x t
BCLK
ALE
length=2
WSTWEN>3
(WSTWEN - 2.5) x t
BCLK
t
WDH
Write Data Hold
Time
(t
BCLK
/2) - 1
(t
BCLK
/2)
+ 1
ns
t
WAS
Write Address Setup
Time
(WSTWEN + 1/2) x
t
BCLK
-1
4)
(WSTWEN + 1/2) x
t
BCLK
+1
4)
ns
t
WAH
Write Address Hold
Time
t
BCLK
/2
ns
t
AW
ALE pulse width
(ALE_LENGTH x t
BCLK
)-1
(ALE_LENGTH x t
BCLK
)
+1
ns
t
AAH
Address to ALE hold
time
(t
BCLK
/2)
-1
(t
BCLK
/2)
+ 1
ns
t
AAS
Address to ALE
setup time
(ALE_LENGTH x t
BCLK
)- 1
ns
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