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參數(shù)資料
| 型號： | STM32F103RB |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Performance Line, ARM-based 32-bit MCU with Flash, USB, CAN,Seven 16-bit Timers, Two ADCs and Nine Communication interfaces(增強(qiáng)型，基于ARM內(nèi)核的32位 MCU，帶有Flash，USB，CAN，7個(gè)16位計(jì)時(shí)器，兩個(gè)ADC，兩個(gè)DAC和9個(gè)通信接口) |
| 中文描述： | 績效線，基于ARM的閃存，USB，加拿大，7 16 32位MCU位計(jì)時(shí)器，兩個(gè)ADC和9個(gè)通信接口（增強(qiáng)型，基于ARM的內(nèi)核的32位微控制器，帶有閃存，USB，加拿大，7個(gè)16位計(jì)時(shí)器，兩個(gè)模數(shù)轉(zhuǎn)換器，兩個(gè)DAC的和9個(gè)通信接口） |
| 文件頁數(shù)： | 2/79頁 |
| 文件大小： | 1124K |
| 代理商： | STM32F103RB |
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Description
STM32F103xx
Clocks and startup
System clock selection is performed on startup, however the internal RC 8 MHz oscillator is
selected as default CPU clock on reset. An external 4-16 MHz clock can be selected and is
monitored for failure. During such a scenario, it is disabled and software interrupt
management follows. Similarly, full interrupt management of the PLL clock entry is available
when necessary (for example with failure of an indirectly used external oscillator).
Several prescalers allow the configuration of the AHB frequency, the High Speed APB
(APB2) and the low Speed APB (APB1) domains. The maximum frequency of the AHB and
the High Speed APB domains is 72 MHz. The maximum allowed frequency of the Low
Speed APB domain is 36 MHz.
Boot modes
At startup, boot pins are used to select one of three boot options:
●
Boot from User Flash
●
Boot from System Memory
●
Boot from SRAM
The boot loader is located in System Memory. It is used to reprogram the Flash memory by
using the USART.
Power supply schemes
●
VDD = 2.0 to 3.6 V: external power supply for I/Os and the internal regulator.
Provided externally through VDD pins.
●
VSSA, VDDA = 2.0 to 3.6 V: external analog power supplies for ADC, Reset blocks, RCs
and PLL. In VDD range (ADC is limited at 2.4 V).
●
VBAT = 1.8 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup
registers (through power switch) when VDD is not present.
Power supply supervisor
The device has an integrated Power On Reset (POR)/Power Down Reset (PDR) circuitry. It
is always active, and ensures proper operation starting from/down to 2 V. The device
remains in reset mode when VDD is below a specified threshold, VPOR/PDR, without the need
for an external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
VDD power supply and compares it to the VPVD threshold. An interrupt can be generated
when VDD drops below the VPVD and/or when VDD is higher than the VPVD threshold. The
interrupt service routine can then generate a warning message and/or put the MCU into a
safe state. The PVD is enabled by software.
Refer to Table 9: Embedded reset and power control block characteristics for the values of
VPOR/PDR and VPVD.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STM32F103RBH6 | 功能描述:ARM微控制器 - MCU 32BIT Cortex M3 M3 72MHz 64pins RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| STM32F103RBH6TR | 制造商:STMicroelectronics 功能描述:16/32-BITS MICROS - Tape and Reel |
| STM32F103RBH6XXX | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces |
| STM32F103RBH7 | 功能描述:ARM微控制器 - MCU 32-Bit ARM Cortex 128kb Performance RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| STM32F103RBH7TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces |
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