參數(shù)資料
型號: STLC7550TQFP
廠商: 意法半導(dǎo)體
英文描述: LOW POWER LOW VOLTAGE ANALOG FRONT END
中文描述: 低電壓低功耗模擬前端
文件頁數(shù): 11/17頁
文件大?。?/td> 174K
代理商: STLC7550TQFP
ELECTRICAL SPECIFICATIONS
Unless otherwise noted, Electrical Characteristics are specified over the operating range.
Typical values are given for V
DD
= 3V, T
amb
= 25°C and for nominal Master clock frequency
MCLK = 1.536MHz and oversampling ratio = 160.
Absolute Maximum Ratings
(referenced to GND)
Symbol
V
DD
DC Supply Voltage
V
I
,V
IN
Digital or Analog Input Voltage
I
I
,I
IN
Digital or Analog Input Current
I
O
Digital Output Current
I
OUT
Analog Output Current
T
oper
Operating Temperature
T
stg
Storage Temperature
P
DMAX
Maximum Power Dissipation
ESD
Electrostatic Discharge
Parameter
Value
-0.3, 7.0
-0.3, V
DD
+0.3
±
1
±
20
±
10
0, 70
-40, 125
200
2000
Unit
V
V
mA
mA
mA
°C
°C
mW
V
Nominal DC Characteristics
(V
DD
= 3V
±
5%, GND = 0V, T
A
= 0 to 70°C unless otherwise specified)
Symbol
Parameter
V
DD
Supply Voltage Range
POWER SUPPLY AND COMMON MODE VOLTAGE
SINGLE POWER SUPPLY (DV
DD
= AV
DD
)
I
DDA
Analog Supply Current
I
DDD
Digital Supply Current
I
DD
-LP
Supply Current in Low Power Mode
MCLK Stopped
MCLK Running
V
CM
Output Common Mode Voltage
V
CM
Output Voltage Load Current (see Note 1)
DIGITAL INTERFACE
V
IL
Low Level Input Voltage
V
IH
High Level Input Voltage
I
I
Input Current V
I
= V
DD
or V
I
= GND
V
OH
High Level Output Voltage (I
LOAD
= -600
μ
A)
V
OL
Low Level Output Voltage (I
LOAD
= 800
μ
A)
ANALOG INTERFACE
V
REF
Differential Reference Voltage Output
V
REF
= (V
REFP
- V
REFN
)
Tempco (V
REF
) V
REF
Temperature Coefficient
V
CMO IN
Input Common Mode Offset Voltage = [(IN+)+(IN-)]/2 -V
CM
V
DIF IN
Differential Input Voltage : [(IN+)-(IN-)]
2 x V
REF
V
OFF IN
Differential Input DC Offset Voltage
V
CMO OUT
Output Common Mode Voltage Offset :
(OUT+ + OUT-)/2 - V
CM
(see Note 1)
V
DIF OUT
Differential Output Voltage : OUT+ - OUT-
2 x V
REF
V
OFF OUT
Differential Output DC Offset Voltage : (OUT+ - OUT-) (0000x)
R
IN
Input Resistance IN+, IN- (id. AUX IN)
R
OUT
Output Resistance (OUT+, OUT-)
R
L
Load Resistance (OUT+, OUT-)
C
L
Load Capacitance (OUT+, OUT-)
V
ADO OUT
Output A/D Modulator Voltage Offset : IN+ = IN- = V
CM
Min.
2.70
Typ.
3
Max.
5.5
Unit
V
6
4
1
mA
mA
μ
A
μ
A
V
200
V
DD
/2
10
V
DD
/2-5%
V
DD
/2+5%
-0.3
0.5
V
V
μ
A
V
V
DV
DD
-0.5
-10
DV
DD
-0.5
±
1
10
0.3
1.15
1.25
1.35
V
200
ppm/°C
mV
Vpp
mV
mV
-100
100
2 x V
REF
-100
-20
100
20
2 x V
REF
V
-100
100
100
mV
k
k
pF
LSB
50
10
20
-1000
+1000
Note :
1. Device is very sensitive to noise on V
CM
Pin. V
output voltage load current must be DC (<10
μ
A). in order to drive dynamic load,
V
CM
must be buffered. AC variation in V
CM
current magnitude decrease A/D and D/A performance.
STLC7550
11/17
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