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參數(shù)資料
| 型號： | STLC7546 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | MODEM (V.34bis) Analog Front End(調(diào)制解調(diào)器模擬前端) |
| 中文描述： | 調(diào)制解調(diào)器（V.34bis）模擬前端（調(diào)制解調(diào)器模擬前端） |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 131K |
| 代理商： | STLC7546 |
T
s ta
Aux IN+
(Aux IN-)
IN+
(IN-)
MUX
0 (+6dB in diff. input)
V
REFP
V
REFN
V
CM
Analog
Σ
Modulator
Low-Pass
(0.425 x Sampling
Frequency)
Atten.
0dB/
6dB/
Infinite
DAC
Switched
CFilter
2nd Order
Modulator
Serial
Ports
And
Control
Regis ter
HC0
HC1
OUT+
OUT-
AV
DD
AGNDR AGNDT
VC1
VC2
MCLK
RESET
PWRDWN
DV
DGND
DD
D
D
SCLK
FS
T
T
std2
std1
OUT
IN
STLC7546
Low-Pass
(0.425 x Sampling
Frequency)
7
BLOCK DIAGRAM
1 - TRANSMIT D/A SECTION
The functions included in the Tx D/A section are
detailedhereafter.
16-bit 2’s complement data format is used in the
DAC channel.
1.1 - TransmitLow Pass Filters
The transmit low pass filter is basicallyan interpo-
lating filter. It is a combination of Finite Impulse
Response filter (FIR) and an Infinite Impulse Re-
sponsefilter(IIR).
Thedigitalsignalfromtheserialinterfacegetsinterpo-
lated by 2, 3, 4, 5 or 6 x Sampling Frequency (FS)
throughtheIIRfilter.The signalis furtherinterpolated
by32xFSxn(withnequalto2,3,4,5,6)throughthe
IIRandFIRfilter.Thelowpassfilterisfollowedbythe
DAC. The DAC is oversampledat 64,96, 128, 160,
192x FS.Theoversamplingratioisuserselectable.
1.2 - D/A Converter
TheoversampledD/Aconverterincludesa second
order digital noise shaper, a one bit D/Aconverter
and a singlepole analog low-pass filter.
The gain of the last output stage can be pro-
grammed to 0dB, -6dB or infinite attenuation.The
cut-offfrequencyofthesinglepoleswitch-capacitor
low-pass filter is :
fc
3dB
=
MCLK
2
π
10
with MCLK = Master Clock frequency.
Continuous-time filtering of the analog differential
output is necessaryusing an off-chipamplifier and
a few externalpassivecomponents.
Atleast86dBsignalto noiseplusdistortionratiocan
beobtainedinthefrequencybandof0.425x9.6kHz
(with an oversamplingratioequalto 160).
2 - RECEIVEA/D SECTION
ThedifferentfunctionsincludedintheADCchannel
sectionaredescribedbelow.16-bit 2’scomplement
data formatis usedin the ADC.
2.1 - A/DConverter
The oversampled A/D converter is based on a
second order sigma-delta modulator. To produce
excellentcommon-moderejectionof unwantedsig-
nals, the analog signal is processed differentially
until it is converted to digital data. Single-ended
mode can also be used. The ADC is oversampled
at 64,96, 128,160 or 192x FS. The oversampling
ratio is user selectable. At least -86dB SNDR can
be expected in the 0.425 x 9.6kHzbandwidthwith
a -6dBr differential input signal and an oversam-
pling ratio equal to 160.
FUNCTIONALDESCRIPTION
STLC7546
6/16
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