參數(shù)資料
型號: STLC5460
廠商: 意法半導(dǎo)體
英文描述: Line Card Interface Controller(線路卡片接口控制器)
中文描述: 線卡接口控制器(線路卡片接口控制器)
文件頁數(shù): 30/54頁
文件大?。?/td> 376K
代理商: STLC5460
RECEIVE COMMAND/INDICATE STATUS REGISTER (RCIS)
7
0
EVENT
RRP
OVR
0
MO
G2
G1
G0
After Reset 00 (H)
EVENT
EVENT = 1.
A primitive has been received twiceidentically. The number of Command/Indicate
channelsis give by MO, G2, G1, G0.
RRP
Read Receive Primitive
RRP = 1 the mp has to read the primitive receivedin orderto allow the next on to be
processed.
OVERRUN
OVR = 1. The previous primitive has not been read by the microprocessor.
If MO = 0, Multiplex0
if MO = 1, Multiplex 1.
GCI 0 to GCI 7 channelof each multiplex.
OVR
MO
G 0/2
TEST REGISTER(TEST)
7
0
FWD
WITG
DCA
SAV
After Reset 00 (H)
LP
PRSC
DCG
SGV
FWD
FalseWord Detection
FWD = 1, the counterindicates the number of wrong bytes
FWD = 0, the counterindicates the number of wrong bits.
Word integrity.
WITG= 1. The first bit of the Pseudo Random Sequence(2*11-1) is the firstbit of the
channel (or subchannel)selected in the Time Slot at the beginningof the transmission.
WITG= 0. The first bit of the PRS is transmittedwithout taking into accountthe place
in the Time Slot.
Double channelfor analyser.
DCA = 1. The analyserreceivesPseudo RandomSequence from two channels.
DCA = 0. The analyserreceivesPseudo RandomSequence from one channel.
SequenceAnalyser Validation.When this bit goes to ”1”, the Analyserof Pseudo
RandomSequence(2*11-1)is connectedinstead of ExtractA Register i f DCA = 0,
insteadof Extract A and ExtractB registersif DCA = 1. Then the synchronisation is
researched.
WhenSAV = 0, the analyseris initiated.
NB : WhenDCA= 0, Insert B registercan be used normally.
Loopback.
WhenLP = 1, the six data streamsgoing out (PCM 0/3 and MUX 0/1) are respectively
connectedinstead of datastream coming from the 6 inputs (PCM 0/3 and MUX 0/1).
The loopbackis transparentor not, dependingon M0D,M1D, P0E, P1E, P2E, P3E
bits of Multiplex and PCM ConfigurationRegisters.
PseudoRandomSequence Corrupted.
Whenthis bit changesfrom 0 to 1, one PRS bitis corrupted if DCG = 0, two PRS bits
are corruptedif DCG = 1 (one bit in each channel). After transmittingcorrupted bit(s),
PRSC changesfrom ”1” to”0”.
Double channelfor Generator.
DCG = 1. The generatortransmits Pseudo Random Sequenceto two channels.
DCG = 0. The generatortransmits Pseudo Random Sequenceto one channel.
SequenceGenerator Validation.
Whenthis bit goes to ”1”, the generatorprovides Pseudo Random Binary Sequence
2 * 11-1 in accordancewith CCITT RecommendationO.152. The generatoris
WITG
DCA
SAV
LP
PRSC
DCG
SGV
STLC5460
30/54
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