
PIN DEFINITIONSAND FUNCTIONS
Symbol
VDD1
A0
Pin number
1
2
Type (*)
I
I (**)
Function
Supply Voltage 5V,
±
5% .
Non Multiplexed Mode:
this input interfaces to the system’s address bus to select an internal
register for a read or write access.
Multiplexed Mode:
A0 at VDD, NRDY/NWAIT pin delivers NWAIT
A0 at VSS, NRDY/NWAIT pin delivers NREADY
Receive PCM interface Data : Serial data is received at these lines at
standard TTL orCMOS levels.
RxD3
RxD2
RxD1
RxD0
A1
3
4
5
6
7
I
I (**)
Non Multiplexed Mode:
this input interfaces to the system’s address bus to select an internal
register for a read or write access.
Multiplexed Mode:
A1 at VDD, NCS signal provided by the system is not inverted by the circuit.
A1 at VSS, NCS signal provided by the system is inverted by the circuit.
Tristate control for the PCM interface. These lines are low when the
corresponding TxD outputs are valid.
TSC0
TSC1
TSC2
TSC3
TxD0
TxD1
TxD2
TxD3
PFS
PDC
A2
8
10
12
14
9
11
13
15
16
17
18
OD
O
Transmit PCM interface Data : Serial data is sent by these lines at standard
TTLor CMOS levels. Thesepins can be tristated.
I
I
PCM interface frame synchronization pulse.
PCM interface dataclock, singleor double rate.
Non Multiplexed Mode:
this input interfaces to the system’s address bus to select an intenal register
for a read or write access.
Multiplexed Mode:
A2 at VDD, AS/ALE signal providedby the system is not inverted by the circuit
A2 at VSS, AS/ALEsignal provided by the system is inverted by the circuit
Address Data Bus. Ifthe multiplexed address/data
μ
P interface bus mode is
selected these pins transfer data and commands between the
μ
P and the
STLC5460.
I (**)
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
VSS1
DS/NRD
19
20
21
22
23
24
25
26
27
28
I/O
If a demultiplexed mode is used, these bits interface with the system data
bus.
I
I
Ground : 0V
Motorola like mode: Data Strobe
Intel Like Mode: Not Read
The signal indicates aread operation, active low
Motorola like mode: Read/Write
Intel Like Mode: Not Write
The signal indicates aWrite operation, active low.
Not Chip select. A low on this line selects the STLC5460 for a read/write
operation.
RW/NWR
29
I
NCS
30
I
(*): (I) Input
(O) Output
(IO) In/Output
(OD) Open Drain
(**): With Pull up resistance.
STLC5460
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