參數(shù)資料
型號(hào): STLC5460
廠商: 意法半導(dǎo)體
英文描述: Line Card Interface Controller(線路卡片接口控制器)
中文描述: 線卡接口控制器(線路卡片接口控制器)
文件頁(yè)數(shù): 15/54頁(yè)
文件大小: 376K
代理商: STLC5460
TS and PCMn
at 4 Mb/s
with n = 0 or 2
TS0
TS1
TS2
TS3
TS30
TS31
TS32
TS62
TS63
TSNB = 1
TS at
2Mb/s
PCM at
2Mb/s
TS at
2Mb/s
PCM at
2Mb/s
TS0
TS0
TS1
TS1
TS15
TS15
TS16
TS31
TS31
PCMn
PCMn+1
PCMn
PCMn+1
PCMn
PCMn+1
PCMn
PCMn
PCMn+1
TSNB = 0
TS0
TS1
TS2
TS3
TS30
TS31
TS0
TS30
TS31
PCMn
PCMn+1
TS and PCM0
at 8 Mb/s
TS0
TS1
TS2
TS3
TS4
TS124
TS32
TS62
TS63
TSNB = 1
TS at
2Mb/s
PCM at
2Mb/s
TS0
TS0
TS0
TS0
TS1
TS31
TS31
TS31
TS31
PCM0
PCM1
PCM2
PCM3
PCM0
PCM0
PCM1
PCM2
PCM3
TS and PCM
at 8Mb/s
TS0 to TS31
TS32 to TS63
TS64 to TS95
TS96 to TS127
TSNB = 0
TS at
2Mb/s
PCM at
2Mb/s
TS0 to TS31
TS0 to TS31
TS0 to TS31
TS0 to TS31
PCM0
PCM1
PCM2
PCM3
COMPLEMENTARY PCM OFFSETREGISTER(CPOF)
7
0
PMD1
PMD0
TIM1
TIM0
After Reset 00 (H)
OOF1
IOF0
IOF1
IOF0
PMD1/0 PCM Mode
PMD1
0
0
1
1
PMD0
0
1
0
1
The PCM are at
2048 kbit/s
4096 kbit/s
8192 kbit/s
Not used.
TIM 1/0 these bits are taken into account only if bit TIM of COMPregister is at 1; in this case an inter-
rupt is generatedperiodically and TIM 1/0 definesthe period
TIM1
0
0
1
1
TIM0
0
1
0
1
Period
1ms
8ms
64ms
250ms
OOF1/0
Output Offset 1/0.
These two bitsare associated with OOF2/9ofOPOFRegister.
IOF1/0
InputOffset 1/0.
These two bitsare associated with IOF2/9of IPOFRegister.
STLC5460
15/54
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