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參數(shù)資料
| 型號： | STLC5444 |
| 廠商： | 意法半導體 |
| 英文描述： | Quad Feed Power Supply(ISDN四饋電電源) |
| 中文描述： | 四飼料電源（綜合業(yè)務數(shù)字網(wǎng)四饋電電源） |
| 文件頁數(shù)： | 9/17頁 |
| 文件大小： | 140K |
| 代理商： | STLC5444 |
OPERATIVE DESCRIPTION.
Initialization
The device is initialized by the RESET pin. In this
state the analog drivers are switched off, the Indi-
rect Address Register (IAR) is cleared, and the in-
ternallylatchedaddress A0 is cleared.
Power at Outputdrivers
The voltageat the Output drivers is approximately
V
BB
(moreprecisely: V
BB
- V
SAT
).
Analog Section
The analog section consists of four line drivers,
which are DMOS transistor switches capable of
sinking up to 120 mA each. The power to the driv-
ers is derived from the negative supply voltage
(V
BB
). The output voltage to each line is slaved to
V
BB
, and the voltage drop in each driver is ap-
proximately1.5V.
Line driver protection is provided through the inte-
gration of current limit and over-temperatureshut-
off. The current limit is hardware-programmable
via an external resistor (RLIM) connected be-
tweenILIM and V
BB
.
The output limit is : 5mA + 1000 x 1.25V/RLIM.
This 1000 x gain makes the ILIM pin susceptible
to externalnoise, care shouldbe taken to connect
RLIM asclose as possible to the component.
The thermal shut-off is internally set at approxi-
mately 160
o
C.
At this temperatureall the driversare uncondition-
ally switched off. However, at approximately
130
o
C, only the drivers that are in the current-
overload conditionwill be turnedoff.
Status detectors, associated with each of the line
drivers, monitor the load conditions on each line
by comparing an electrical parameter (e.g., cur-
rent and voltage at the line) with reference level.
The output of each detector can be read by the
microprocessor. In addition to these status detec-
tors, the temperature of the device is monitored
via integrated temperature detectors. The detec-
tors respond at approximately 130
o
C and 160
o
C,
as defined above, and the 160
o
C detectorcan be
monitoredby the microprocessorvia the MPI. The
status detectors provide the following information
from each of the lines (all detectors have built-in
hysteresis):
*) Low Output Voltage Detection
The low-output-voltagestatusbit becomesac-
tive whenthe voltage across the output DMOS
transistor exceedsthe proper voltage threshold
(V
LVD
).
*) Open Loop Detection
The open-loopstatusbit becomesactive when
the current on the line drops below a minimum
value.
*) Current OverloadDetection
The current-overloadstatus bitsbecome active
when the current on the linenears the current
limit. Thesebits active the INT outputif COD in-
terrupts are enabledvia the IARRegister.
*) Thermal OverloadDetection
If the device temperaturereaches 130
o
C, then
all the line drivers in the current-overloadcondi-
tion will be switched off and the corresponding
bitsin the Thermal Overload Register will be
activated. If the device temperatureincreases
to 160
o
C, all the line drivers will be turnedoff,
and all the bits in the Thermal Overload Regis-
ter will be activated.
The T-bit will also be set, and it can be read
alongwith the IndirectAddressRegister (IAR)
to indicate that all the drivers have been turned
off. To initialize any of the bits in the Thermal
OverloadRegister, the microprocessormust
firstturn off the line drivers that must not be re-
activateduntil the T-bit in the address register
is clearedby the temperaturedetector in the
device.
MPI Section
The MPI allows the user to access the detectors
defined in the analog section. The line driver’s
status bits are grouped by function.Bits 3-0 of the
detectorscorrespondto lines 3-0, respectively.
The statusgroup are:
Low VoltageDetector (LVD)
Open Loop Detector(OLD)
CurrentOverload Detector(COD)
ThermalOverload Register(TOR)
The data is not latched in these status groups ex-
cept in the TOR.
Thus, the user should filter (multiple samples) the
received data to ensure its integrity. There are
two other registers in the MPI: the Indirect Ad-
dress Register (IAR), and Line Enable Register
(LER).
The IAR contains 3 bits that address the desired
status group or the LER. The IAR is read along
with the T-bit defined in the analog section. The
microprocessor can read the IAR to check the va-
lidity of the address. A 1us delay is required be-
tween a write to the LER register, followed by a
Read of the same register. Subsequent reads of
the LER do not havethis constraint.
STLC5444
9/17
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| STLC5445 | 功能描述:監(jiān)控電路 Asics RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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| STLC5460FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
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