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參數(shù)資料
| 型號： | STLC5412FN |
| 廠商： | 意法半導體 |
| 英文描述： | 2B1Q U INTERFACE DEVICE ENHANCED WITH DECT MODE |
| 中文描述： | 2B1Q U接口裝置加強與無繩模式 |
| 文件頁數(shù)： | 28/74頁 |
| 文件大?。?/td> | 655K |
| 代理商： | STLC5412FN |
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Table 3:
Network-to-NT 2B1Q SuperframeTechnique and Overhead Bit Assignments.
FRAMING
2B+D
Overhead Bits (M
1
-
M
6
)
Quat Positions
Bit Positions
1-9
1-18
10-117
19-234
118s
235
118m
236
119s
237
119m
238
120s
239
120m
240
Super
Frame
#
Basic
Frame
#
Sync
Word
ISW
SW
SW
SW
SW
SW
SW
SW
2B+D
M
1
M
2
M
3
M
4
M
5
M
6
A
1
2
3
4
5
6
7
8
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
2B+D
eoc
a1
eoc
dm
eoc
i3
eoc
i6
eoc
a1
eoc
dm
eoc
i3
eoc
i6
eoc
a2
eoc
i1
eoc
i4
eoc
i7
eoc
a2
eoc
i1
eoc
i4
eoc
i7
eoc
a3
eoc
i2
eoc
i5
eoc
i8
eoc
a3
eoc
i2
eoc
i5
eoc
i8
act
dea
1
1
1
1
uoa
aib
1
1
1
febe
crc
2
crc
4
crc
6
crc
8
crc
10
crc
12
crc
1
crc
3
crc
5
crc
7
crc
9
crc
11
B,C,...
NT-to-Network superframe delay offset from Network-to-NT superframe by 60
±
2 quats (about 0.75
ms).All bits than the Sync Word are scrambled.
Symbols & Abbreviations:
”1”
eoc
reserve = reserved bit for future standard; set = 1
embedded operations channel
a = address bit
dm = data/message indicator
i = information (data/message)
synchronization word
act
crc
activation bit
cyclic redundancy check: covers 2B+D & M4
1 = most significantbit
2 = next most significant bit
etc
far end block errorbit (set = 0 for errored
superframe)
deactivation bit (set = 0 to announce deactivation)
u only activation bit (set = 1to activate S/T)
alarm indication bit (set = 0 to indicate interruption)
SW
febe
ISW
s
m
inverted synchronization word
sign bit(first) in quat
magnitude bit (second) in quat
dea
uoa
aib
Table 2:
2B1QEncoding of 2B+ D Fields.
Data
Time
→
B
I
B
g
D
Bit Pair
Quat # (relative)
# Bits
# Quats
b
11
b
12
q
1
b
13
b
14
q
2
b
15
b
16
q
3
b
17
b
18
q
4
b
21
b
22
q5
b
23
b
24
q
6
b
25
b
26
q
7
b
27
b
28
q
8
d
1
d
2
q
9
2
1
8
4
8
4
Where:
b
11
= first bit of B
1
octet as received at the S/T interface
b
18
= last bit of B
I
octet as received at theS/T interface
b
21
= first bit of B
2
octet as received at the S/T interface
b
28
= last bit of B
2
octet as received at theS/Tinterface
d
1
d
2
= consecutive D-channel bits (d
1
is first bit of pair as received atthe S/T interface)
q
i
= ith quat relative to start of given 18-bit2B+D data field.
NOTE
: There are 12 2B+D 18-bit fieldsper 1.5 msec basic frame.
STLC5412
28/74
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