參數(shù)資料
型號(hào): STLC5048
廠商: 意法半導(dǎo)體
元件分類: Codec
英文描述: FULLY PROGRAMMABLE FOUR CHANNEL CODEC AND FILTER
中文描述: 完全可編程四通道解碼器和過濾器
文件頁數(shù): 25/45頁
文件大?。?/td> 371K
代理商: STLC5048
25/45
STLC5048
Example: if T36..T30=00:
Receive Time Slot ch #0 (DRTS0)
Addr=56h; Reset Value=00h
EN0=0: Disable reception of selected time slot.
EN0=1: Selected receive time slot on DR input is PCM decoded and transferred to VFRO0 output.
R06..0: Define receive time slot number (0 to 127) on carrying the PCM signal to be decoded and transferred
to VFRO0 output. If linear mode is selected (LIN=1 of CONF register) the 16 bits will be used as linear code as
follows: the 8 most significant bits in the programmed time slot, the 8 least significant bits in the following
timeslot.
Example: if R06..R00=00:
Receive Time Slot ch #1 (DRTS1)
Addr=57h; Reset Value=00h
EN1=0: Disable reception of selected time slot.
EN1=1: Selected receive time slot on DR input is PCM decoded and transferred to VFRO1 output.
R16..0: Define receive time slot number (0 to 127) on carrying the PCM signal to be decoded and transferred
to VFRO1 output. If linear mode is selected (LIN=1 of CONF register) the 16 bits will be used as linear code as
follows: the 8 most significant bits in the programmed time slot, the 8 least significant bits in the following time
slot.
Example: if R16..R10=00:
Receive Time Slot ch #2 (DRTS2)
Addr=58h; Reset Value=00h
TS0
TS1
15
14
13
12
11
10
9
8
6
5
4
3
7
2
1
0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
1
0
1
0
1
1
0
EN0
R06
R05
R04
R03
R02
R01
R00
TS0
TS1
15
14
13
12
11
10
9
8
6
5
4
3
7
2
1
0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
1
0
1
0
1
1
1
EN1
R16
R15
R14
R13
R12
R11
R10
TS0
TS1
15
14
13
12
11
10
9
8
6
5
4
3
7
2
1
0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
1
0
1
1
0
0
0
EN2
R26
R25
R24
R23
R22
R21
R20
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