參數(shù)資料
型號: STLC3065Q
廠商: 意法半導體
英文描述: WLL SUBSCRIBER LINE INTERFACE CIRCUIT
中文描述: 環(huán)路用戶線路接口電路
文件頁數(shù): 7/27頁
文件大?。?/td> 194K
代理商: STLC3065Q
Table 2 shows all the possible combinations be-
tween switches configurations and operating
modes.
A detailed description of each configuration can
be found in the ”O(jiān)PERATING MODES” descrip-
tion section.
OPERATINGMODES
Power Down (PWD)
D0
D1
D2
P1
P2
DET
DET1
DET2
0
0
X
0
0
disable
disable
disable
DC CHARACTERISTIC & SUPERVISION
When this mode is selected both 2W ports
(TIP1/RING1and TIP2/RING2) are in high imped-
ance; all switches Sw1 to Sw6 are open (see
fig.1)
The SLIC core is switched off and the line detec-
tors are disabled therefore the off-hook condition
cannot be detected.
This mode can be selected in emergency condi-
tion when it is necessary to cut any current deliv-
ered to the line.
This mode is also forced by STLC3065in case of
thermaloverload(Tj > 140
°
C).
In this case the device goes back to the previous
status as soon as the junction temperature de-
crease underthe hysteresisthreshold.
AC CHARACTERISTICS
Both the 2W ports (TIP1/RING1and TIP2/RING2)
are set in high impedance,the TX outputbufferis
a low impedance output, no AC transmission is
possible.
High ImpedanceFeeding(HI-Z)
D0
D1
D2
P1
P2
DET
DET1
DET2
0
0
X
1
1
off/hk
line 1+2
off/hk
line 1
off/hk
line 2
0
0
X
0
1
off/hk
line 2
disable
off/hk
line 1
0
0
X
1
0
off/hk
line 1
off/hk
line 1
disable
DC CHARACTERISTIC & SUPERVISION
This operating mode is normally selected when
the telephoneis in on-hookin order to monitorthe
line status keeping the power consumption at the
minimum.
The SLIC core of STLC3065 is
(see fig.1 or FUNCTIONAL DIAGRAM); the two
line series switches (Sw1; Sw2) are open. De-
pending on P1, P2 the 2W ports (TIP1/RING1
and TIP2/RING2) can be in high impedance or
connected to
the built in
(2x1500
) via SW3T and SW5R or SW4T and
SW6R.
P1
controls
TIP1/RING1
TIP2/RING2(seeFig.1 and Table 2).
When this mode is selectednormally both P1, P2
bitsshould be set to one.
The output voltage in on-hook condition is equal
to the self generated batteryvoltage(-50Vtyp).
When off-hook occurs on 2W port 1 (2) the cur-
rent flowing through the RING1(2) wire activates
the DET1 (2_) detector indicating the line status
change. When DET1 or DET2 are activated also
the DET becomeactive (low logiclevel).
The off-hook threshold in HI-Z mode is the same
value programmedin ACTIVEmode.
The DC characteristic in HI-Z mode is just equal
to the self generated battery with 2x(1500W+Rp)
in PWD mode
feeding resistors
and
P2
controls
Where:
”O(jiān)pen”:
the line port termination is in high impedance.
”To P.S. via Res”:
the TIP(n) wire is connected to BGND through a 1500
resistor , the RING(n) wire is
connected to VBAT by a 1500
resistor. Thecurrent flowing in the second resistoris used
to detect the off-hook .
”To Buffer”:
the TIP(n) wire and RING(n) wire are connected to the SLIC core line driver and the off-
hook detection is performed using the SLIC core supervision circuit that drives the DET
output.
”300
μ
A bias”:
the TIP(n) wire is connected to BGND through a 1500
resistor , the RING(n) wire is
biased by a 300
μ
A current generator to negative battery (Vbat)
Note: see also Appendix C
STLC3065
7/27
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