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參數(shù)資料
| 型號(hào)： | STLC3065 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | WLL SUBSCRIBER LINE INTERFACE CIRCUIT |
| 中文描述： | 環(huán)路用戶線路接口電路 |
| 文件頁數(shù)： | 12/27頁 |
| 文件大小： | 194K |
| 代理商： | STLC3065 |
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ExternalComponents List
In order to properly define the external compo-
nents value the following system parameters
have to be defined:
The AC input impedanceshown by the SLIC at
the line terminals ”Zs” to which the return loss
measurement is referred. It can be real (typ.
600
) or complex.
The AC balance impedance, it is the equiva-
lent impedance of the line ”Zl” used for evalu-
ation of the trans-hybrid loss performances
(2/4 wire conversion). It is usually a complex
impedance.
The value of the two protection resistors Rp in
series with the line termination.
The line impedance at the TTX frequency
”Zlttx”.
The metering pulse level amplitude measured
at line termination ”V
LOTTX
”. In case of low or-
der filtering, V
LOTTX
represents the amplitude
(Vrms) of the fundamental frequency compo-
nent. (typ12 or 16KHz).
Pulse metering envelope rise and decay time
constant”t”.
The slope of theringing waveform”
V
TR/
T
”.
The value of the constant current limit current
”Ilim”.
The value of the off-hook current threshold
”I
TH
”.
The value of the ring trip rectified average
thresholdcurrent”I
RTH
”.
The value of the required self generatednega-
tive battery ”V
BATR
” in ring mode (max value is
70V). This value can be obtained from the de-
sired ringpeak level +5V.
The value of the maximum current peak sunk
from Vpos”IPK”.
STLC3065
12/27
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STLC3065Q | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:WLL SUBSCRIBER LINE INTERFACE CIRCUIT |
| STLC3065QTR | 制造商:STMicroelectronics 功能描述: |
| STLC3075 | 制造商:STMicroelectronics 功能描述: |
| STLC3075_09 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Integrated POTS interface for home access gateway and WLL |
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