參數(shù)資料
型號: STLC2500
廠商: 意法半導(dǎo)體
英文描述: BLUETOOTH⑩ SINGLE CHIP
中文描述: 單芯片藍(lán)牙⑩
文件頁數(shù): 8/23頁
文件大?。?/td> 241K
代理商: STLC2500
STLC2500
8/23
Table 14. STLC2500 pin list (Test)
(1) To be strapped to VSS_ANA
Table 15. STLC2500 pin list (Configuration)
The configuration pins are used to select different modes of operation for the chip:
Where '1' means VDD_IO_A and '0' means VSS_DIG.
The other two configuration pins, CONFIG_RF and CONFIG_R have to be strapped to VSS_DIG.
6
FUNCTIONAL DESCRIPTION
6.1
The transmitter uses the serial transmit data from the baseband. The transmitter modulator converts this
data into GFSK modulated I and Q digital signals. These signals are then converted to analogue signals
that are low pass filtered before up-conversion. The carrier frequency drift is limited by a closed loop PLL.
Transmitter
6.2
The STLC2500 implements a low-IF receiver for Bluetooth modulated input signals. The radio signal is
taken from a balanced RF input and amplified by an LNA. The mixers are driven by two quadrature LO
signals, which are locally generated from a VCO signal running at twice the frequency. The I and Q mixer
output signals are band pass filtered by a poly-phase filter for channel filtering and image rejection. The
Receiver
Name
PIN #
Description
DIR
Reset
Default
V
DDIO
Analogue test pin
VDD_T
ABUS_IN_QN
C06
A08
Test supply
Test pin
I/O
Input
(1)
Input
(1)
Input
(1)
Input
(1)
Input
(1)
Input
(1)
Input
(1)
Input
(1)
ABUS_QP_IP
A09
Test pin
I/O
ABUS_IP_QP
B07
Test pin
I/O
ABUS_QN_IN
B08
Test pin
I/O
ANA_1
A10
Analogue test pin
(Leave unconnected)
Analogue test pin
(Leave unconnected)
Analogue test pin
(Leave unconnected)
Analogue test pin
(Leave unconnected)
Test pin (Leave unconnected)
ANA_2
B04
ANA_3
C10
ANA_4
D09
AF_PRG
K10
I/O
Open
Open
Digital or analogue incoming system clock
CONFIG_CLK =’1’
The incoming system clock is a digital square signal.
(See chapter 3.4.)
The incoming system clock is a sine wave signal.
(See chapter 3.4.)
CONFIG_CLK =’0’
Initiated Low Power modes
CONFIG_JS =’0’ AND CONFIG_M = ‘0’
CONFIG_JS =’0’ AND CONFIG_M = ‘1’
CONFIG_JS =’1’ AND CONFIG_M = ‘0’
CONFIG_JS =’1’ AND CONFIG_M = ‘1’
Reserved
Initiated low power, mode 1. (See chapter 7.8.)
Initiated low power, mode 2. (See chapter 7.8.)
Reserved
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